A rewiring technique for integrated circuit operation analysis using a silicon oxide film deposited by a focused ion beam

1991 ◽  
Vol 9 (5) ◽  
pp. 2653 ◽  
Author(s):  
Haruki Komano
Keyword(s):  
Oxide Film ◽  
Integrated Circuit ◽  
Focused Ion Beam ◽  
Silicon Oxide ◽  
Ion Beam ◽  
Silicon Oxide Film ◽  
Operation Analysis

Silicon Oxide Film Formation by Focused Ion Beam (FIB)-Assisted Deposition

1990 ◽  
Vol 29 (Part 1, No. 1) ◽  
pp. 219C-219C
Author(s):  
Haruki Komano ◽  
Youji Ogawa ◽  
Tadahiro Takigawa
Keyword(s):  
Oxide Film ◽  
Focused Ion Beam ◽  
Silicon Oxide ◽  
Film Formation ◽  
Ion Beam ◽  
Silicon Oxide Film

Silicon Oxide Film Formation by Focused Ion Beam (FIB)-Assisted Deposition

1989 ◽  
Vol 28 (Part 1, No. 11) ◽  
pp. 2372-2375 ◽  
Author(s):  
Haruki Komano ◽  
Youji Ogawa ◽  
Tadahiro Takigawa
Keyword(s):  
Oxide Film ◽  
Focused Ion Beam ◽  
Silicon Oxide ◽  
Film Formation ◽  
Ion Beam ◽  
Silicon Oxide Film

Beam induced deposition of an ultraviolet transparent silicon oxide film by focused gallium ion beam

1996 ◽  
Vol 68 (6) ◽  
pp. 732-734 ◽  
Author(s):  
M. Ogasawara ◽  
M. Kariya ◽  
H. Nakamura ◽  
H. Komano ◽  
S. Inoue ◽  
...  
Keyword(s):  
Oxide Film ◽  
Silicon Oxide ◽  
Ion Beam ◽  
Silicon Oxide Film

Multi Domain Alignment of Liquid Crystals on Silicon Oxide Film Surfaces through Ion Beam Exposure

2008 ◽  
Vol 47 (11) ◽  
pp. 8476-8478 ◽  
Author(s):  
Phil Kook Son ◽  
Bong Kyun Jo ◽  
Jae Chang Kim ◽  
Tae-Hoon Yoon ◽  
Soon Joon Rho ◽  
...  
Keyword(s):  
Liquid Crystals ◽  
Oxide Film ◽  
Silicon Oxide ◽  
Ion Beam ◽  
Silicon Oxide Film ◽  
Domain Alignment

Novel Approach of Improving Secondary Electron Detector in FIB System

2018 ◽  
Author(s):  
Steve Wang ◽  
Jim McGinn ◽  
Peter Tvarozek ◽  
Amir Weiss
Keyword(s):  
Integrated Circuit ◽  
Secondary Electron ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Vital Role ◽  
Electron Detector ◽  
System A ◽  
Novel Approach

Abstract Secondary electron detector (SED) plays a vital role in a focused ion beam (FIB) system. A successful circuit edit requires a good effective detector. Novel approach is presented in this paper to improve the performance of such a detector, making circuit altering for the most advanced integrated circuit (IC) possible.

TEM Sample Preparation Tricks for Advanced DRAMs

2015 ◽  
Author(s):  
Ching Shan Sung ◽  
Hsiu Ting Lee ◽  
Jian Shing Luo
Keyword(s):  
Electron Microscopy ◽  
Transmission Electron Microscopy ◽  
Sample Preparation ◽  
Integrated Circuit ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Tem Analysis ◽  
Cross Sectional ◽  
Transmission Electron ◽  
Characterization Of Materials

Abstract Transmission electron microscopy (TEM) plays an important role in the structural analysis and characterization of materials for process evaluation and failure analysis in the integrated circuit (IC) industry as device shrinkage continues. It is well known that a high quality TEM sample is one of the keys which enables to facilitate successful TEM analysis. This paper demonstrates a few examples to show the tricks on positioning, protection deposition, sample dicing, and focused ion beam milling of the TEM sample preparation for advanced DRAMs. The micro-structures of the devices and samples architectures were observed by using cross sectional transmission electron microscopy, scanning electron microscopy, and optical microscopy. Following these tricks can help readers to prepare TEM samples with higher quality and efficiency.

Automatic Determination of Optimal FIB Operations for Improved Circuit Probing and Fast Reconfiguration

2000 ◽  
Author(s):  
Romain Desplats ◽  
Timothee Dargnies ◽  
Jean-Christophe Courrege ◽  
Philippe Perdu ◽  
Jean-Louis Noullet
Keyword(s):  
Integrated Circuit ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Semiconductor Devices ◽  
Front Side ◽  
Automatic Determination ◽  
Metal Line ◽  
New Approach ◽  
Metal Layers

Abstract Focused Ion Beam (FIB) tools are widely used for Integrated Circuit (IC) debug and repair. With the increasing density of recent semiconductor devices, FIB operations are increasingly challenged, requiring access through 4 or more metal layers to reach a metal line of interest. In some cases, accessibility from the front side, through these metal layers, is so limited that backside FIB operations appear to be the most appropriate approach. The questions to be resolved before starting frontside or backside FIB operations on a device are: 1. Is it do-able, are the metal lines accessible? 2. What is the optimal positioning (e.g. accessing a metal 2 line is much faster and easier than digging down to a metal 6 line)? (for the backside) 3. What risk, time and cost are involved in FIB operations? In this paper, we will present a new approach, which allows the FIB user or designer to calculate the optimal FIB operation for debug and IC repair. It automatically selects the fastest and easiest milling and deposition FIB operations.

A Methodology to Reduce Ion Beam Induced Damage in TEM Specimens Prepared by FIB

2002 ◽  
Author(s):  
Chin Kai Liu ◽  
Chi Jen. Chen ◽  
Jeh Yan.Chiou ◽  
David Su
Keyword(s):  
Electron Microscopy ◽  
Transmission Electron Microscopy ◽  
Sample Preparation ◽  
Integrated Circuit ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Specimen Preparation ◽  
Tem Analysis ◽  
Sensitive Issue ◽  
Transmission Electron

Abstract Focused ion beam (FIB) has become a useful tool in the Integrated Circuit (IC) industry, It is playing an important role in Failure Analysis (FA), circuit repair and Transmission Electron Microscopy (TEM) specimen preparation. In particular, preparation of TEM samples using FIB has become popular within the last ten years [1]; the progress in this field is well documented. Given the usefulness of FIB, “Artifact” however is a very sensitive issue in TEM inspections. The ability to identify those artifacts in TEM analysis is an important as to understanding the significance of pictures In this paper, we will describe how to measure the damages introduced by FIB sample preparation and introduce a better way to prevent such kind of artifacts.

Integrated Circuit Device Repair Using FIB System: Tips, Tricks, and Strategies

1999 ◽  
Author(s):  
K. N. Hooghan ◽  
K. S. Wills ◽  
P.A. Rodriguez ◽  
S.J. O’Connell
Keyword(s):  
Integrated Circuit ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Dead Reckoning ◽  
Physical Damage ◽  
Art Form ◽  
Metal Levels ◽  
Potential Damage ◽  
On Chip ◽  
Beam Currents

Abstract Device repair using Focused Ion Beam(FIB) systems has been in use for most of the last decade. Most of this has been done by people who have been essentially self-taught. The result has been a long learning curve to become proficient in device repair. Since a great deal of the problem is that documentation on this “art form” is found in papers from many different disciplines, this work attempts to summarize all of the available information under one title. The primary focus of FIB device repair is to ensure and maintain device integrity and subsequently retain market share while optimizing the use of the instrument, usually referred to as ‘beam time’. We describe and discuss several methods of optimizing beam time. First, beam time should be minimized while doing on chip navigation to reach the target areas. Several different approaches are discussed: dead reckoning, 3-point alignment, CAD-based navigation, and optical overlay. Second, after the repair areas are located and identified, the desired metal levels must be reached using a combination of beam currents and gas chemistries, and then filled up and strapped to make final connections. Third, cuts and cleanups must be performed as required for the final repair. We will discuss typical values of the beam currents required to maintain device integrity while concurrently optimizing repair time. Maintaining device integrity is difficult because of two potentially serious interactions of the FIB on the substrate: 1) since the beam consists of heavy metal ions (typically Gallium) the act of imaging the surface produces some physical damage; 2) the beam is positively charged and puts some charge into the substrate, making it necessary to use great care working in and around capacitors or active areas such as transistors, in order to avoid changing the threshold voltage of the devices. Strategies for minimizing potential damage and maximizing quality and throughput will be discussed.

Sign in / Sign up

Export Citation Format

Share Document