Sputter etching in an argon–oxygen plasma and its implications to device fabrication

Any electron microscopical study of the morphology of bulk polymers has throughout the years been hampered by the lack of any real ability to produce meaningful surface variations for replication. True etching of polymers should show crystalline and amorphous regions in some form of relief. The use of solvents, acids, organic vapors, and inert ion bombardment to etch samples has proved to be useful only in limited applications. Certainly many interpretations of these results are subject to question.The recent use of a radiofrequency (R. F.) plasma of oxygen to degrade and remove organic material with only minor heating has opened a new possibility for etching polymers. However, rigid control of oxygen flow, time, current, and sample position are necessary in order to obtain reproducible results. The action is confined to surface layers; the molecular weight of the polymer residue after heavy etching is the same as the molecular weight of the polymer before attack, within the accuracy of measurement.

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Structural changes in silicon-on-insulator material during post-implantation annealing

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100145054 ◽

1986 ◽

Vol 44 ◽

pp. 736-737

Author(s):

C. O. Jung ◽

S. J. Krause ◽

S.R. Wilson

Keyword(s):

Integrated Circuits ◽

Oxide Layer ◽

High Speed ◽

Structural Changes ◽

Device Fabrication ◽

Silicon On Insulator ◽

High Quality ◽

Radiation Hardened ◽

Post Implantation ◽

Very High

Silicon-on-insulator (SOI) structures have excellent potential for future use in radiation hardened and high speed integrated circuits. For device fabrication in SOI material a high quality superficial Si layer above a buried oxide layer is required. Recently, Celler et al. reported that post-implantation annealing of oxygen implanted SOI at very high temperatures would eliminate virtually all defects and precipiates in the superficial Si layer. In this work we are reporting on the effect of three different post implantation annealing cycles on the structure of oxygen implanted SOI samples which were implanted under the same conditions.

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Analysis of Silicon-On-Insulator Structures Formed By Oxygen Ion Implantation

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100118370 ◽

1985 ◽

Vol 43 ◽

pp. 300-301

Author(s):

N. Lewis ◽

E. L. Hall ◽

A. Mogro-Campero ◽

R. P. Love

Keyword(s):

Ion Implantation ◽

Single Crystal ◽

Single Crystal Silicon ◽

Silicon Layer ◽

Device Fabrication ◽

Silicon On Insulator ◽

High Dose ◽

Crystal Silicon ◽

Oxygen Ion ◽

Oxygen Ion Implantation

The formation of buried oxide structures in single crystal silicon by high-dose oxygen ion implantation has received considerable attention recently for applications in advanced electronic device fabrication. This process is performed in a vacuum, and under the proper implantation conditions results in a silicon-on-insulator (SOI) structure with a top single crystal silicon layer on an amorphous silicon dioxide layer. The top Si layer has the same orientation as the silicon substrate. The quality of the outermost portion of the Si top layer is important in device fabrication since it either can be used directly to build devices, or epitaxial Si may be grown on this layer. Therefore, careful characterization of the results of the ion implantation process is essential.

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Effects of substrate quality and annealing on defect structures at GaAs/Si interfaces

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100126494 ◽

1987 ◽

Vol 45 ◽

pp. 340-341

Author(s):

H. L. Tsai ◽

J. W. Lee

Keyword(s):

Growth Process ◽

Molecular Beam ◽

Substrate Surface ◽

Lattice Misfit ◽

Device Fabrication ◽

Silicon Substrates ◽

Defect Structures ◽

Gaas Film ◽

Substrate Quality ◽

Gaas On Si

Growth of GaAs on Si using epitaxial techniques has been receiving considerable attention for its potential application in device fabrication. However, because of the 4% lattice misfit between GaAs and Si, defect generation at the GaAs/Si interface and its propagation to the top portion of the GaAs film occur during the growth process. The performance of a device fabricated in the GaAs-on-Si film can be degraded because of the presence of these defects. This paper describes a HREM study of the effects of both the substrate surface quality and postannealing on the defect propagation and elimination.The silicon substrates used for this work were 3-4 degrees off [100] orientation. GaAs was grown on the silicon substrate by molecular beam epitaxy (MBE).

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Tem analysis of multiple-energy arsenic implanted and Rta'd silicon

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100126135 ◽

1987 ◽

Vol 45 ◽

pp. 246-247

Author(s):

R.A. Herring

Keyword(s):

Device Fabrication ◽

High Concentration ◽

Tem Analysis ◽

Defect Clusters ◽

High Fluences ◽

Small Defect ◽

Before And After ◽

The Matrix ◽

The Difference ◽

Factor Type

Rapid thermal annealing (RTA) of ion-implanted Si is important for device fabrication. The defect structures of 2.5, 4.0, and 6.0 MeV As-implanted silicon irradiated to fluences of 2E14, 4E14, and 6E14, respectively, have been analyzed by electron diffraction both before and after RTA at 1100°C for 10 seconds. At such high fluences and energies the implanted As ions change the Si from crystalline to amorphous. Three distinct amorphous regions emerge due to the three implantation energies used (Fig. 1). The amorphous regions are separated from each other by crystalline Si (marked L1, L2, and L3 in Fig. 1) which contains a high concentration of small defect clusters. The small defect clusters were similar to what had been determined earlier as being amorphous zones since their contrast was principally of the structure-factor type that arises due to the difference in extinction distance between the matrix and damage regions.

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Behavior of contact-silicided TFSOI gate structures

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100172036 ◽

1994 ◽

Vol 52 ◽

pp. 860-861

Author(s):

N. David Theodore ◽

Juergen Foerstner ◽

Peter Fejes

Keyword(s):

Semiconductor Device ◽

Series Resistance ◽

Field Effect Transistors ◽

Silicon Layer ◽

Device Fabrication ◽

Silicon On Insulator ◽

Continuous Layer ◽

Buried Oxide ◽

Device Structures ◽

Thin Silicon

As semiconductor device dimensions shrink and packing-densities rise, issues of parasitic capacitance and circuit speed become increasingly important. The use of thin-film silicon-on-insulator (TFSOI) substrates for device fabrication is being explored in order to increase switching speeds. One version of TFSOI being explored for device fabrication is SIMOX (Silicon-separation by Implanted OXygen).A buried oxide layer is created by highdose oxygen implantation into silicon wafers followed by annealing to cause coalescence of oxide regions into a continuous layer. A thin silicon layer remains above the buried oxide (~220 nm Si after additional thinning). Device structures can now be fabricated upon this thin silicon layer.Current fabrication of metal-oxidesemiconductor field-effect transistors (MOSFETs) requires formation of a polysilicon/oxide gate between source and drain regions. Contact to the source/drain and gate regions is typically made by use of TiSi2 layers followedby Al(Cu) metal lines. TiSi2 has a relatively low contact resistance and reduces the series resistance of both source/drain as well as gate regions

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