scholarly journals Crystallographic dependence of the lateral undercut wet etch rate of Al0.5In0.5P in diluted HCl for III–V sacrificial release

2013 ◽  
Vol 31 (1) ◽  
pp. 011209 ◽  
Author(s):  
Thor Ansbæk ◽  
Elizaveta S. Semenova ◽  
Kresten Yvind ◽  
Ole Hansen
Keyword(s):  
Etch Rate ◽  
Wet Etch

Feasibility to Fabricate the 45° Slant with Anisotropic Silicon Etching in NaOH Solution

2012 ◽  
Vol 503-504 ◽  
pp. 615-619 ◽  
Author(s):  
Alonggot Limcharoen ◽  
Chupong Pakpum ◽  
Pichet Limsuwan
Keyword(s):  
Data Storage ◽  
Etch Rate ◽  
Silicon Etching ◽  
Naoh Solution ◽  
Conventional Photolithography ◽  
Sio2 Mask ◽  
P Type ◽  
Anisotropic Silicon Etching ◽  
Wet Etch ◽  
Laser Light Source

The experiments to study the feasibility to fabricate the 45 slant on p-type (100)-oriented silicon wafer were done. The various mask shapes, rectangular, cross, circle and boomerang, were patterned on the SiO2 mask by utilizing the conventional photolithography and dry etching process for investigating the anisotropic wet etch characteristic. The edge of masks were align in two crystal direction, 110 and 100 that is allowable to get a better understanding about the crystal orientation and the angle between planes in a crystal system. The very low etch rate,  50 nm/min, process regime was selected to fabricate the 45 slant with the concept is the lowest of an overall etch rate in the system to reach the level that is possible to detect the (110) plane. The etch recipe can be used for the next development work to built a housing of the laser light source for applying in a data storage technology.

Advances in Test Wafer Reclaim Technology – Wet Stripping Porous Low-k Films with No Substrate Damage

2009 ◽  
Vol 145-146 ◽  
pp. 339-342 ◽  
Author(s):  
Mark Robson ◽  
Kristin A. Fletcher ◽  
Ping Jiang ◽  
Michael B. Korzenski ◽  
A. Upham ◽  
...  
Keyword(s):  
Film Thickness ◽  
Etch Rate ◽  
Oxide Growth ◽  
Semiconductor Processing ◽  
Related Cost ◽  
Increasing Demand ◽  
Wet Etch ◽  
Low K

In semiconductor processing, test wafers are used as particle monitors, film thickness monitors for deposition and oxide growth measurements, dry/wet etch rate monitors, CMP monitors, as well as characterizing new and existing equipment and processes. Depending on fab size and capacity, monthly test wafer usage can be tens of thousands or more. Due to the ever increasing demand for silicon between the IC and solar markets and the high cost of 300mm wafers, chip manufacturers are increasing their efforts to reduce overall spending on silicon - currently by far the largest non equipment related cost [1]. One approach taken by many chip makers is the concept of extending the usable life of test wafers by re-using them as many times as possible through a reclaim process.

High Throughput Wet Etch Solution for BEOL TiN Removal

2016 ◽  
Vol 255 ◽  
pp. 245-250
Author(s):  
Chia Jung Hsu ◽  
Chieh Ju Wang ◽  
Sheng Hung Tu ◽  
Makonnen Payne ◽  
Emanuel Cooper ◽  
...  
Keyword(s):  
Hydrogen Peroxide ◽  
High Throughput ◽  
Etch Rate ◽  
Manufacturing Processes ◽  
Mixing Ratio ◽  
Strong Base ◽  
Wet Etch ◽  
Tin Removal ◽  
Low K ◽  
Etch Residue

Sub-10 nm technology node manufacturing processes may require the use of thicker and denser TiN hard mask for patterning at the BEOL. The modified TiN, which tends to be more chemically robust, must be removed using a wet etch process, while maintaining typical throughput - no extension of typical wet etch process times. To satisfy these needs, a new TiN etching accelerator was found that enhanced the activity of peroxide-related species in a wet etch chemical formulation that achieved increased TiN etch rate relative to formulation without TiN etch rate accelerator (Sample 1), while also minimizing the damage to ultra-low-k inter layer dielectric (ILD) layer by a strong base, also present in the formulation. We report here the result of a solvent based formulation, which adopted the TiN etching accelerator. The formulation was able to maintain TiN etch rate and remove post-etch residue, while remaining selective to ultra-low-k ILD, Co and Cu. The TiN etch rate of the accelerator enhanced formulation can be further tuned by modifying the process temperature or the hydrogen peroxide to formulation mixing ratio and has the potential capability to process > 400 wafers.

Silicon Wafer Thinning to Reveal Cu TSV

2012 ◽  
Vol 2012 (DPC) ◽  
pp. 001673-001700 ◽  
Author(s):  
Laura Mauer ◽  
John Taddei ◽  
Ramey Youssef
Keyword(s):  
Silicon Wafer ◽  
Etch Rate ◽  
Cost Effective ◽  
Silicon Etching ◽  
3D Integration ◽  
Process Flow ◽  
Cost Effective Method ◽  
Etch Rates ◽  
Wet Etch ◽  
Wafer Thinning

3D Integration is becoming a reality in device manufacturing. The TSV Middle process is becoming the dominant integration scenario. For this process flow the silicon wafer needs to be thinned to reveal the Cu TSV. Grinding is used to remove the bulk of the silicon wafer. Currently a multistep sequence of processes that includes CMP and plasma have been used to complete the final thinning of the silicon. This paper will describe a simple, cost effective method to wet etch the remaining silicon to reveal the Cu TSVs. KOH is selected as the etchant since it will not attack the TSV materials and has a higher etch rate than TMAH. The development of processes with optimum etch rates and uniformity for silicon etching along with no attack of the Cu via or oxide liner and effective post cleaning to remove residual Potassium will be presented.

Monitoring of Wet Etch for Wafer Thinning and Via Reveal Process

2013 ◽  
Vol 2013 (1) ◽  
pp. 000008-000012
Author(s):  
Chuannan Bai ◽  
Eugene Shalyt ◽  
Guang Liang ◽  
Peter Bratin
Keyword(s):  
Process Control ◽  
Etch Rate ◽  
Back Side ◽  
Reaction Products ◽  
Product Characteristics ◽  
Pros And Cons ◽  
Last Stage ◽  
Silicon Vias ◽  
Wet Etch ◽  
Wafer Thinning

TSV (Through Silicon Vias) are usually formed and deposited as blind vias. As a last stage, vias are opened by thinning of the back side of the wafer. While the bulk of the silicon can be removed by both wet and dry methods, the final step of the “Via Reveal” process is predominantly performed by wet etch. Two commonly used types of etching solutions are anisotropic alkaline etch (KOH, TMAH, etc.) and isotropic etch (HF/HNO3, etc.). Etch rate, uniformity, and product characteristics strongly depend on the composition of solution: both original compounds and reaction products. This presentation describes different approaches for process control of both alkaline and acidic etch solutions using advanced spectroscopic models and potentiometry. Pros and cons of different approaches are discussed. Specific emphasis is placed on the monitoring of reaction products.

Investigation of Choline Hydroxide for Selective Silicon Etch from a Gate Oxide Failure Analysis Standpoint

2002 ◽  
Author(s):  
Valentina Korchnoy
Keyword(s):  
Aqueous Solution ◽  
Oxide Film ◽  
Failure Analysis ◽  
Surface Quality ◽  
Etch Rate ◽  
Gate Oxide ◽  
Silicon Etching ◽  
Poly Silicon ◽  
Wet Etch

Abstract A robust procedure for poly-silicon wet etch selective to SiO2 is presented. The procedure is applicable for CMOS devices and maintains the integrity of the gate oxide film. The technique uses a 50% wt. choline hydroxide aqueous solution. The optimum etching conditions, which allow exposure of gate oxide to enable its further inspection using SEM or AFM were determined. An investigation of general silicon etching characteristics of choline hydroxide, as etch rate, selectivity and surface quality, has been carried out as well.

scholarly journals Correlation of film density and wet etch rate in hydrofluoric acid of plasma enhanced atomic layer deposited silicon nitride

AIP Advances ◽  
2016 ◽  
Vol 6 (6) ◽  
pp. 065012 ◽  
Author(s):  
J. Provine ◽  
Peter Schindler ◽  
Yongmin Kim ◽  
Steve P. Walch ◽  
Hyo Jin Kim ◽  
...  
Keyword(s):  
Silicon Nitride ◽  
Hydrofluoric Acid ◽  
Etch Rate ◽  
Atomic Layer ◽  
Film Density ◽  
Wet Etch

Composition and Properties of PECVD Silicon Nitride Films Deposited from SiH4, N2, He Gases

1991 ◽  
Vol 219 ◽  
Author(s):  
J. H. Souk ◽  
G. N. Parsons ◽  
J. Batey
Keyword(s):  
Silicon Nitride ◽  
Electrical Properties ◽  
Etch Rate ◽  
Charge Trapping ◽  
Film Stress ◽  
Bond Density ◽  
Silicon Nitride Films ◽  
Current Voltage ◽  
Optical And Mechanical Properties ◽  
Wet Etch

ABSTRACTAmorphous silicon nitride films deposited from a gas mixture of SiH4 and N2 with a large flow of He have shown many interesting characteristics. The films show a wide variety of electrical, optical, and mechanical properties with varying amounts of SiH4 and N2. The effect of N2 flow rate on film composition in N2-SiH4 processes is quite different from that of NH3 flow in NH3-SiH4 processes. The films were characterized by measurements of (1) Si-H and N-H bond density and bonded hydrogen content, both from infrared absorption, (2) Si/N ratio, (3) refractive index, (4) film stress, and (5) wet chemical etch rate and (6) electrical properties including current-voltage (I-V) and capacitance-voltage (C-V). We find that adding helium to the PECVD process enhances the incorporation of nitrogen in the film and an optimized flow of SiH4 improves the electrical properties. Films with optimum electrical properties with minimum charge trapping are obtained with N/Si ratio close to 1.33. These films have a small amount of Si-H and N-H bonds, and a low etch rate (> 100 A/min) in aqueous HF solution. The properties of these low temperature (250°C) PECVD nitrides have many similarities with LPCVD nitrides. Compared with films deposited from SiH4, NH3 mixture, these films exhibit very low wet etch rates and much lower H contents, but greater hysteresis in C-V characteristics.

Dependence of wet etch rate on deposition, annealing conditions and etchants for PECVD silicon nitride film

2009 ◽  
Vol 30 (9) ◽  
pp. 096005 ◽  
Author(s):  
Tang Longjuan ◽  
Zhu Yinfang ◽  
Yang Jinling ◽  
Li Yan ◽  
Zhou Wei ◽  
...  
Keyword(s):  
Silicon Nitride ◽  
Etch Rate ◽  
Nitride Film ◽  
Silicon Nitride Film ◽  
Annealing Conditions ◽  
Wet Etch

scholarly journals Evidence for low-energy ions influencing plasma-assisted atomic layer deposition of SiO2: Impact on the growth per cycle and wet etch rate

2020 ◽  
Vol 117 (3) ◽  
pp. 031602 ◽  
Author(s):  
K. Arts ◽  
J. H. Deijkers ◽  
T. Faraz ◽  
R. L. Puurunen ◽  
W. M. M. (Erwin) Kessels ◽  
...  
Keyword(s):  
Atomic Layer Deposition ◽  
Etch Rate ◽  
Atomic Layer ◽  
Low Energy ◽  
Layer Deposition ◽  
Wet Etch ◽  
Low Energy Ions
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