Focused ion beam fabrication of two dimensional photonic crystals in silicon-on-insulator

Author(s):  
K. Balasubramanian ◽  
P. J. Heard ◽  
M. J. Cryan
2004 ◽  
Vol 03 (01n02) ◽  
pp. 81-85
Author(s):  
E. Yu. GAVRILIN ◽  
Yu. B. GORBATOV ◽  
V. V. STARKOV ◽  
A. F. VYATKIN

Photonic crystals are the very promising novel materials for micro- and nanophotonics for visible region. To produce photonic crystals for this region of light, artificial structures with characteristic sizes less than 1 μm have to be manufactured. Electrochemical deep anodic etching and plasma etching techniques is normally used to produce such structures in silicon wafers. However, standard way of deep anodic etching realization is not suitable for sub-micrometer porous silicon formation. In the present work combination of the deep anodic etching and focused ion beam techniques is used to produce ordered structure of macropores in silicon.


2006 ◽  
Author(s):  
Wico C. L. Hopman ◽  
René M. de Ridder ◽  
Shankar Selvaraja ◽  
Cazimir G. Bostan ◽  
Vishwas J. Gadgil ◽  
...  

Author(s):  
Z. G. Song ◽  
S. K. Loh ◽  
X. H. Zheng ◽  
S.P. Neo ◽  
C. K. Oh

Abstract This article presents two cases to demonstrate the application of focused ion beam (FIB) circuit edit in analysis of memory failure of silicon on insulator (SOI) devices using XTEM and EDX analyses. The first case was a single bit failure of SRAM units manufactured with 90 nm technology in SOI wafer. The second case was the whole column failure with a single bit pass for a SRAM unit. From the results, it was concluded that FIB circuit edit and electrical characterization is a good methodology for further narrowing down the defective location of memory failure, especially for SOI technology, where contact-level passive voltage contrast is not suitable.


Author(s):  
Julien Goxe ◽  
Béatrice Vanhuffel ◽  
Marie Castignolles ◽  
Thomas Zirilli

Abstract Passive Voltage Contrast (PVC) in a Scanning Electron Microscope (SEM) or a Focused Ion Beam (FIB) is a key Failure Analysis (FA) technique to highlight a leaky gate. The introduction of Silicon On Insulator (SOI) substrate in our recent automotive analog mixed-signal technology highlighted a new challenge: the Bottom Oxide (BOX) layer, by isolating the Silicon Active Area from the bulk made PVC technique less effective in finding leaky MOSFET gates. A solution involving sample preparation performed with standard FA toolset is proposed to enhance PVC on SOI substrate.


2019 ◽  
Vol 493 ◽  
pp. 271-278
Author(s):  
R. Ribeiro-Andrade ◽  
T.L. Vasconcelos ◽  
R.M.S. Kawabata ◽  
M.P. Pires ◽  
P.L. Souza ◽  
...  

2002 ◽  
Vol 61-62 ◽  
pp. 875-880 ◽  
Author(s):  
K. Avary ◽  
J.P. Reithmaier ◽  
F. Klopf ◽  
T. Happ ◽  
M. Kamp ◽  
...  

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