scholarly journals A 3-wire SPI Protocol Chip Design with Application-Specific Integrated Circuit (ASIC) and FPGA Verification

2017 ◽  
Author(s):  
Min-Chun Tuan ◽  
Shih-Lun Chen ◽  
Yu-Kuen Lai ◽  
Chun-Chieh Chen ◽  
Ho-Yin Lee
Keyword(s):  
Integrated Circuit ◽  
Chip Design ◽  
Circuit Asic ◽  
Fpga Verification ◽  
Application Specific Integrated Circuit ◽  
Application Specific

scholarly journals Design of ASIC Square Calculator Using AncientVedic Mathematics

2018 ◽  
Vol 7 (2.23) ◽  
pp. 464
Author(s):  
Angshuman Khan ◽  
Sudip Halder ◽  
Shubhajit Pal
Keyword(s):  
Integrated Circuit ◽  
Software Tool ◽  
Logic Gates ◽  
Digital Logic ◽  
Simple Design ◽  
Innovative Design ◽  
Circuit Asic ◽  
Vedic Mathematics ◽  
Application Specific Integrated Circuit ◽  
Application Specific

This article includes a simple design of Vedic square calculator for Application Specific Integrated Circuit (ASIC). This is a straightforward and innovative design of Vedic calculator using only few basic digital logic gates. Among the all sutras and sub sutras of ancient Vedic mathematics, the sutra ‘Urdhva Tiryagbyham’ is used here for square calculation of two bits numbers which results in an effortless and faster method of square calculation than all the existing methods. The design and minimization of the circuit has been carried out to achieve a standard architecture that is the simplest too. Here Xilinx ISE software tool is used rigorously to simulate the architecture.  

scholarly journals ASIC-Resistant Proof of Work Based on Power Analysis of Low-End Microcontrollers

Mathematics ◽  
2020 ◽  
Vol 8 (8) ◽  
pp. 1343
Author(s):  
Hyunjun Kim ◽  
Kyungho Kim ◽  
Hyeokdong Kwon ◽  
Hwajeong Seo
Keyword(s):  
Integrated Circuit ◽  
Hash Function ◽  
Power Analysis ◽  
Post Processing ◽  
Circuit Asic ◽  
Final Output ◽  
Application Specific Integrated Circuit ◽  
Application Specific ◽  
Measured Power

Application-Specific Integrated Circuit (ASIC)-resistant Proof-of-Work (PoW) is widely adopted in modern cryptocurrency. The operation of ASIC-resistant PoW on ASIC is designed to be inefficient due to its special features. In this paper, we firstly introduce a novel ASIC-resistant PoW for low-end microcontrollers. We utilized the measured power trace during the cryptographic function on certain input values. Afterward, the post-processing routine was performed on the power trace to remove the noise. The refined power trace is always constant information depending on input values. By performing the hash function with the power trace, the final output was obtained. This framework only works on microcontrollers and the power trace depends on certain input values, which is not predictable and computed by ASIC.

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