Eulerian Multiphase Conjugate Model for Chip-Embedded Micro-Channel Flow Boiling

Author(s):  
Pritish R. Parida ◽  
Hsin-Hua Tsuei ◽  
Timothy J. Chainer

The 3D (three dimensional) integration of microelectronic chips into chip stacks is an enabling technology to provide a possible path for increasing computational performance. However, 3D chip stacks require a solution to significant new thermal challenges. As a feasible solution, two-phase cooling utilizing a chip-to-chip interconnect-compatible dielectric fluid can be used. This chip-integrated micrometer scale two-phase cooling technology can be essential to fully optimize the benefits of improved integration density and modularity of 3D stacking of high performance integrated circuits (ICs) for future computing systems; but is faced with significant developmental challenges including high fidelity modeling. In the present work, an Eulerian multiphase model has been developed for simulating two-phase evaporative cooling through chip embedded microscale cavities. First, the model was used to predict the flow and heat transfer characteristics for coolant R245fa flowing through a single straight micro channel with cross section 100 × 100 um and length 10 mm. The flow is sub-cooled in the initial section of the channel and saturated in the remaining. The results were compared to experimental data available from literature, focusing on the model capability to predict the correct flow pattern, temperature profile and pressure drop. Next, the validated model was extended to the simulation of complex flow geometries expected in microprocessor chip-stacks with chip-to-chip interconnects.

Author(s):  
Pritish R. Parida

The information technology (IT) industry is exploring three-dimensional (3D) stacking of chips to maintain future computing scalability. However, 3D chip stacks require a solution to significant new thermal challenges. Interlayer two-phase evaporative cooling with a chip-to-chip interconnect-compatible dielectric fluid is an enabling technology but faces significant development issues. One such issue is the inability to thermally model a microprocessor with spatially varying heat sources together with a two phase microfluidic convection network. While progress has been made on two-phase conjugate simulations at the chip and channel levels, none of those provide a computationally manageable approach. In the present study, a reduced physics conjugate heat transfer model has been developed for simulating two-phase flow boiling through chip embedded micron scale cavities. This model has been validated with good accuracy against data available from literature. The validated model was then extended to predict the thermal performance of a state-of-the-art microprocessor chip with embedded two-phase cooling, where significant improvements in device junction temperatures were observed compared to the baseline cooling solution.


2010 ◽  
Vol 132 (4) ◽  
Author(s):  
Yoon Jo Kim ◽  
Yogendra K. Joshi ◽  
Andrei G. Fedorov ◽  
Young-Joon Lee ◽  
Sung-Kyu Lim

It is now widely recognized that the three-dimensional (3D) system integration is a key enabling technology to achieve the performance needs of future microprocessor integrated circuits (ICs). To provide modular thermal management in 3D-stacked ICs, the interlayer microfluidic cooling scheme is adopted and analyzed in this study focusing on a single cooling layer performance. The effects of cooling mode (single-phase versus phase-change) and stack/layer geometry on thermal management performance are quantitatively analyzed, and implications on the through-silicon-via scaling and electrical interconnect congestion are discussed. Also, the thermal and hydraulic performance of several two-phase refrigerants is discussed in comparison with single-phase cooling. The results show that the large internal pressure and the pumping pressure drop are significant limiting factors, along with significant mass flow rate maldistribution due to the presence of hot-spots. Nevertheless, two-phase cooling using R123 and R245ca refrigerants yields superior performance to single-phase cooling for the hot-spot fluxes approaching ∼300 W/cm2. In general, a hybrid cooling scheme with a dedicated approach to the hot-spot thermal management should greatly improve the two-phase cooling system performance and reliability by enabling a cooling-load-matched thermal design and by suppressing the mass flow rate maldistribution within the cooling layer.


2004 ◽  
Vol 126 (3) ◽  
pp. 288-300 ◽  
Author(s):  
Weilin Qu ◽  
Seok-Mann Yoon ◽  
Issam Mudawar

Knowledge of flow pattern and flow pattern transitions is essential to the development of reliable predictive tools for pressure drop and heat transfer in two-phase micro-channel heat sinks. In the present study, experiments were conducted with adiabatic nitrogen-water two-phase flow in a rectangular micro-channel having a 0.406×2.032mm2 cross-section. Superficial velocities of nitrogen and water ranged from 0.08 to 81.92 m/s and 0.04 to 10.24 m/s, respectively. Flow patterns were first identified using high-speed video imaging, and still photos were then taken for representative patterns. Results reveal the dominant flow patterns are slug and annular, with bubbly flow occurring only occasionally; stratified and churn flow were never observed. A flow pattern map was constructed and compared with previous maps and predictions of flow pattern transition models. Features unique to two-phase micro-channel flow were identified and employed to validate key assumptions of an annular flow boiling model that was previously developed to predict pressure drop and heat transfer in two-phase micro-channel heat sinks. This earlier model was modified based on new findings from the adiabatic two-phase flow study. The modified model shows good agreement with experimental data for water-cooled heat sinks.


1992 ◽  
Vol 114 (3) ◽  
pp. 290-299 ◽  
Author(s):  
C. O. Gersey ◽  
I. Mudawar

Boiling experiments were performed with FC-72 on a series of nine in-line simulated microelectronic chips in a flow channel to ascertain the effects of channel orientation on critical heat flux (CHF). The simulated chips, measuring 10 mm × 10 mm, were flush-mounted to one wall of a 20 mm × 5 mm flow channel. The channel was rotated in increments of 45 degrees through 360 degrees such that the chips were subjected to coolant in upflow, downflow, or horizontal flow with the chips on the top or bottom walls of the channel with respect to gravity. Flow velocity was varied between 13 and 400 cm/s for subcoolings of 3, 14, 25, and 36°C and an inlet pressure of 1.36 bar. While changes in angle of orientation produced insignificant variations in the single-phase heat transfer coefficient, these changes had considerable effects on the boiling pattern in the flow channel and on CHF for velocities below 200 cm/s,’ with some chips reaching CHF at fluxes as low as 18 percent of those corresponding to vertical upflow. Increased subcooling was found to slightly dampen this adverse effect of orientation. The highest CHF values were measured with near vertical upflow and/or upward-facing chips, while the lowest values were measured with near vertical downflow and/or downward-facing chips. These variations in CHF were attributed to differences in flow boiling regime and vapor layer development on the surfaces of the chips between the different orientations. The results of the present study reveal that, while some flexibility is available in the packaging of multi-chip modules in a two-phase cooling system, some orientations should always be avoided.


Author(s):  
Tannaz Harirchian ◽  
Suresh V. Garimella

Two-phase heat transfer in microchannels can support very high heat fluxes for use in high-performance electronics-cooling applications. However, the effects of microchannel cross-sectional dimensions on the heat transfer coefficient and pressure drop have not been investigated extensively. In the present work, experiments are conducted to investigate the local flow boiling heat transfer in microchannel heat sinks. The effect of channel size on the heat transfer coefficient and pressure drop is studied for mass fluxes ranging from 250 to 1600 kg/m2s. The test sections consist of parallel microchannels with nominal widths of 100, 250, 400, 700, and 1000 μm, all with a depth of 400 μm, cut into 12.7 mm × 12.7 mm silicon substrates. Twenty-five microheaters embedded in the substrate allow local control of the imposed heat flux, while twenty-five temperature microsensors integrated into the back of the substrates enable local measurements of temperature. The dielectric fluid Fluorinert FC-77 is used as the working fluid. The results of this study serve to quantify the effectiveness of microchannel heat transport while simultaneously assessing the pressure drop trade-offs.


Author(s):  
Hongzhang Cao ◽  
H. B. Xu ◽  
N. Liang ◽  
C. Q. Tian

One cavitation structure that the channel cross section expanded suddenly was introduced in single straight microchannel. The experiment was carried out with R-134a as the fluid medium, which was drove by gear pump. The flow pattern was observed by CCD and microscope. The average boiling heat transfer coefficient was estimated with the calculation method proposed in this paper. The experimental results present the boiling began at the cavitation structure, and stable flow boiling was maintained. When heat power grew up the boiling became strong then the pressure drop in the micro-channel increased and the heat transfer was enhanced. The liquid percentage in two-phase flow increased and the length of boiling area became small when mass flux grew up with the fixed heat power.


2021 ◽  
Author(s):  
Alec Nordlund ◽  
Rachel McAfee ◽  
Rebecca Ledsham ◽  
Joshua Gess

Abstract Processor energy density is exceeding the capabilities of conventional air-cooling technology, but two-phase cooling has the potential to manage these resulting heat fluxes at reliable temperatures and higher electrical efficiency. When two-phase cooling is used in tandem with overclocking, data center footprints are reduced as individual chip processing power can be set at limits well beyond the manufacturer’s Thermal Design Power (TDP) or nominal operating condition. This study examines how Liquid Nitrogen (LN2) can be used with Additive Manufacturing (AM) and overclocking to increase the computational performance of a commercially available GPU. The power consumption and frequency relationship were established for both the cryogenically cooled solution and a comparative air-cooled solution. The cryogenic solution saw up to a 17.4% increase in compute efficiency and an 18.1% improvement in compute speed with comparable power efficiency at an equivalent performance level to the air-cooled solution. This study considers the computational performance and efficiency gains that can be acquired through cryogenic cooling on an individual graphics card, which can be replicated on a larger scale in data center applications.


Sign in / Sign up

Export Citation Format

Share Document