Comparison of Thermal Performance of Current High-End Thermal Interface Materials

Author(s):  
Gamal Refai-Ahmed ◽  
Zhaojuan He ◽  
Ellen Heian ◽  
Ramzi Vincent ◽  
Tim Rude ◽  
...  

Reactive NanoTechnologies (RNT) has developed a reactive bonding technology to directly bond silicon dies to heat sinks with indium solder using a reactive multilayered foil. In this new method of bonding, heat is generated locally by exothermic mixing within the multilayered foil. This heat is used to melt indium solder layers to join the dies to the heat sinks. The measured thermal resistance of the resulting solder bond is 4 to 5 K mm2/W (0.006 to 0.008 K in2/W). In addition, the reactive foil also localizes the heat to the interface, thus minimizing residual stress and thermal damage in the components. In this paper we discuss the thermal performance and reliability test results for reactive multilayer bonding with different bond line thicknesses. We also present detailed comparisons of thermal performance between reactive multilayer bonding and other current Thermal Interface Material (TIM) solutions, including polymer-based greases, phase change materials, and low melting metallic alloy. Benchmark tests were done using the graphics processor on an operational video card as a test vehicle. The test results show that the introduction of a reactive multilayer bond as an interface material between the graphics processor and the thermal management device demonstrates significant performance advantages over any of the other current commercially available TIM solutions.

2010 ◽  
Vol 2010 (1) ◽  
pp. 000450-000457
Author(s):  
Michael Gaynes ◽  
Timothy Chainer ◽  
Edward Yarmchuk ◽  
John Torok ◽  
David Edwards ◽  
...  

A thermal solution for an array of voltage transformer modules which are cooled by a large area, common aluminum heat spreader for a high end server was evaluated using an in situ, capacitive bond line thermal measurement technique. The method measures the capacitance of a non-electrically conducting thermal interface material (TIM) between the electronic module and heat spreader to quantify the TIM bond line effective thickness during assembly and operation. The thermal resistance of the TIM has the same geometric dependence as the inverse of capacitance, therefore, the capacitive technique also provided a monitor of the thermal performance of the interface. This technique was applied to measure the bond line in real time during the assembly of the heat spreader to an array of 37 modules mounted on a printed circuit board. The results showed that the target bond lines were not achieved by application of a constant force alone on the heat spreader, and guided an improved assembly process. The mechanical motion of the TIM was monitored in situ during thermal cycling and found to fluctuate systematically from the hot to cold portions of the thermal cycle, either compressing or stretching the TIM respectively. The capacitive bond line trend showed thermal interface degradation vs. cycle count for several modules which was confirmed by disassembly and visual inspection. Areas of depleted TIM ranged as high as 25% of the module area. Several design and material changes were shown to improve the TIM stability. Power cycling tests were run in parallel to the thermal cycle tests to help relate the results to field performance. The capacitance technique enabled the development and verification of a thermal solution for a complex mechanical system early in the development cycle.


Author(s):  
Arv Sinha

Use of underfill materials to encapsulate ball grid arrays (BGAs) or chip scale packages (CSPs) have become very important in increasing the reliability of area array packages [1]. Underfill enhances the reliability of flip-chip devices by distributing the thermo-mechanical stresses [2, 3]. These stresses are generated due to mechanical actuation and coefficient of thermal expansion mismatch (CTE) [3]. They are required due to high power density of the current chip design to achieve fine bond line at the thermal interface material in order to dissipate heat. In this paper, details of reliability assessment using the finite element method and actual test data will be presented and discussed.


Author(s):  
Simon Vandevelde ◽  
Alain Daidié ◽  
Marc Sartor

This paper proposes the use of 1D basic models to build a design assistance tool capable of evaluating the heat transfer between a third-level electronic packaging and its support, considering a conventional configuration where a thermal interface material is placed between these two parts. Using this kind of tool early in the design process may facilitate choices concerning geometry and material. The packaging is modelled by a stepped beam (the equipment) and the interface layer by a nonlinear elastic foundation (the thermal interface material). Considering that the electronic equipment bends under the effect of the forces exerted by the fasteners, the tool makes it possible to determine the contact zone remaining operative after deformation, and the pressure distribution at the interface. Mechanical results are then used to calculate the steady-state heat transfer between the equipment and its support, taking into account the diffusion within the equipment and the thermal interface material, and also the thermal contact resistances, the latter being dependent on the contact pressure. A detailed case study is used to illustrate the utility of the approach. The 1D models are exploited to illustrate the interest of the design assistance tool. The influence of different parameters on the thermal performance is studied and a new innovative proposal is analyzed, which could lead to a significant increase in thermal performance.


2016 ◽  
Vol 138 (1) ◽  
Author(s):  
Chandan K. Roy ◽  
Sushil Bhavnani ◽  
Michael C. Hamilton ◽  
R. Wayne Johnson ◽  
Roy W. Knight ◽  
...  

This study investigates the reliability of low melt alloys (LMAs) containing gallium (Ga), indium (In), bismuth (Bi), and tin (Sn) for the application as Thermal interface materials (TIMs). The analysis described herein involved the in situ thermal performance of the LMAs as well as performance evaluation after accelerated life cycle testing, which included high temperature aging at 130 °C and thermal cycling from −40 °C to 80 °C. Three alloys (75.5Ga & 24.5In, 100Ga, and 51In, 32.5Bi & 16.5Sn) were chosen for testing the thermal performance. Testing methodologies used follow ASTM D5470 protocols and the performance of LMAs is compared with some high-performing commercially available TIMs. Results show that LMAs can offer extremely low (<0.01 cm2 °C/W) thermal resistance compared to any commercial TIMs. The LMA–substrate interactions were explored using different surface treatments (copper and tungsten). Measurements show that depending on the substrate–alloy combinations, the proposed alloys survive 1500 hrs of aging at 130 °C and 1000 cycles from −40 °C to 80 °C without significant performance degradation. The obtained results indicate the LMAs are very efficient as TIMs.


Author(s):  
Saeed Ghalambor ◽  
John Edward Fernandes ◽  
Dereje Agonafer ◽  
Veerendra Mulay

Forced convection air cooling using heat sinks is one of the most prevalent methods in thermal management of microelectronic devices. Improving the performance of such a solution may involve minimizing the external thermal resistance (Rext) of the package. For a given heat sink design, this can be achieved by reducing the thermal interface material (TIM) thickness through promotion of a uniform interfacial pressure distribution between the device and heat sink. In this study, a dual-CPU rackmount server is considered and modifications to the heat sink assembly such as backplate thickness and bolting configuration are investigated to achieve the aforementioned improvements. A full-scale, simplified model of the motherboard is deployed in ANSYS Mechanical, with emphasis on non-linear contact analysis and torque analysis of spring screws, to determine the optimal design of the heat sink assembly. It is observed that improved interfacial contact and pressure distribution is achieved by increasing the number of screws (loading points) and positioning them as close to the contact area as possible. The numerical model is validated by comparison with experimental measurements within reasonable accuracy. Based on the results of numerical analysis, the heat sink assembly is modified and improvement over the base configuration is experimentally quantified through interfacial pressure measurement. The effect of improved interfacial contact on thermal performance of the solution is discussed.


Energies ◽  
2019 ◽  
Vol 12 (11) ◽  
pp. 2080 ◽  
Author(s):  
Andreas Nylander ◽  
Josef Hansson ◽  
Majid Kabiri Samani ◽  
Christian Chandra Darmawan ◽  
Ana Borta Boyon ◽  
...  

As feature density increases within microelectronics, so does the dissipated power density, which puts an increased demand on thermal management. Thermal interface materials (TIMs) are used at the interface between contacting surfaces to reduce the thermal resistance, and is a critical component within many electronics systems. Arrays of carbon nanotubes (CNTs) have gained significant interest for application as TIMs, due to the high thermal conductivity, no internal thermal contact resistances and an excellent conformability. While studies show excellent thermal performance, there has to date been no investigation into the reliability of CNT array TIMs. In this study, CNT array TIMs bonded with polymer to close a Si-Cu interface were subjected to thermal cycling. Thermal interface resistance measurements showed a large degradation of the thermal performance of the interface within the first 100 cycles. More detailed thermal investigation of the interface components showed that the connection between CNTs and catalyst substrate degrades during thermal cycling even in the absence of thermal expansion mismatch, and the nature of this degradation was further analyzed using X-ray photoelectron spectroscopy. This study indicates that the reliability will be an important consideration for further development and commercialization of CNT array TIMs.


Author(s):  
Jun Lu ◽  
Michelle C. Lin ◽  
Bernie Short

With increasingly high powers on processors, memories, and chipsets, the voltage regulators (VR) become heavily loaded and a heatsink is often required to prevent overheating the surrounding components on the board. For VR heatsink designs, thermal interface silicone gap filler pads are often used and there is an increasing need to improve VR thermal solutions by reducing thermal resistance of the TIM. A series of TIM2 thickness and performance measurements based on thermal testing was performed in order to understand gap filler characteristics, optimize TIM performance, and utilize best retention design. By utilizing a VR thermal and mechanical test board in wind tunnel testing using the same VR heatsink, thermal performance of TIM2 using gap filler pads over a range of airflow velocities can be measured and compared. The study shows how the optimum TIM performance can be achieved by using the gap filler pads with appropriate thickness for the given designed heatsink standoff heights. The benefit of choosing the right thickness pads over others can be significant and is a valuable learning that can be applied to future VR heatsink designs. Furthermore, the silicone gap filler characteristics and its relationship to board bending and result TIM thickness and thermal performance are investigated and further improved. The learnings help understand the limitations and where the area of improvement can be for future VR heatsink designs.


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