An Evaluation of Thermal Enhancements to Flip-Chip-Plastic Ball Grid Array (FC-PBGA) Packages

2003 ◽  
Author(s):  
K. Ramakrishna ◽  
T.-Y. Tom Lee
Keyword(s):  
Thermal Conductivity ◽  
Thermal Resistance ◽  
Thermal Performance ◽  
Flip Chip ◽  
Ball Grid Array ◽  
Heat Spreader ◽  
Thermal Enhancement ◽  
Plastic Ball ◽  
Plastic Ball Grid Array ◽  
Underfill Material

Flip-chip plastic ball grid array (FC-PBGA) packages are fast becoming the industry norm, in particular in the performance and cost driven consumer electronics sector. Since high thermal conductivity (k∼15–20 W/(m K)) ceramic substrate is replaced by a low conductivity (k∼0.2–0.5 W/(m K)) organic substrate in the FC-PBGA packages, enhancement of thermal performance of these packages to meet ever increasing demands is crucial for their wide spread use. In this study, enhancements to thermal performance of FC-PBGA packages due to material and design changes and external means such as heat spreaders and overmolding of the packages have been evaluated by solving a conjugate heat transfer models using the methods of computational fluid dynamic. The thermal enhancements evaluated in this study include the effect of thermal conductivity of the chip to package interconnect due to change in underfill material and the C4 bump pitch, effect of package to printed wiring board (PWB) interconnection through the use of thermal balls, effect of a heat spreader on the backside of the die, and overmolding the die without and with a heat spreader. Thermal performance of the FC-PBGA packages have been studied using junction to ambient thermal resistance, Θja, junction-to-board thermal resistance Ψjb, and junction to case thermal resistance ΨjT under natural and forced convection for freestream velocities up to 2 m/s and the for following ranges of parameters: Substrate size: 25 to 35 mm, die size: 6.19×7.81 mm (48 mm2 area) and 9.13×12.95 mm (118 mm2 area), C4 pitch: 250 mm, 150 mm and below, underfill material thermal conductivity: 0.6 to 3.0 W/(m K), no thermal balls between the package and the PWB to 9×9 array of thermal balls on 1.27 mm square pitch, and with copper heat spreader on the back of the bare and overmolded die. Based on previous experience, predictions in this study are expected to be within ±10% of measured data. The following conclusions are drawn from this study: 1. It is concluded that the thermal conductivity of the underfill materials in the range 0.6 to 10 W/(m K) is negligible. 2. It is also concluded that the bump pitch can decrease thermal resistances by 12 to 15 %. The change may be smaller with large die area. 3. Thermal balls (C5) connected to the PTHs in the PWB can decrease thermal resistance by about 10% to 15% as the number of thermal balls & PTHs increase zero to 9×9 on 1.27 mm pitch. The effect die size on this thermal enhancement is more noticeable on Ψjb. 4. Heat spreader on the back of the die decreases Θja by a small amount (6–7%) in natural convection and a large amount, about 25% in forced convection. 5. Overmolded die with heat spreader on the top of the overmold provides better thermal enhancement than heat spreader alone up to about 1 m/s. Beyond 1 m/s, heat spreader (without overmold) performs slightly better.

Evaluation of Thermal Enhancements to Flip-Chip-Plastic Ball Grid Array Packages

2004 ◽  
Vol 126 (4) ◽  
pp. 449-456 ◽  
Author(s):  
K. Ramakrishna ◽  
T.-Y. Tom Lee
Keyword(s):  
Thermal Conductivity ◽  
Thermal Resistance ◽  
Forced Convection ◽  
Thermal Performance ◽  
Flip Chip ◽  
Transfer Problem ◽  
Printed Wiring Board ◽  
Heat Spreader ◽  
Plastic Ball ◽  
Ball Grid Array Packages

Enhancements to thermal performance of FC-PBGA packages due to underfill thermal conductivity, controlled collapse chip connection (C4) pitch, package to printed wiring board (PWB) interconnection through thermal balls, a heat spreader on the backside of the die, and an overmolded die with and without a heat spreader have been studied by solving a conjugate heat transfer problem. These enhancements have been investigated under natural and forced convection conditions for freestream velocities up to 2 m/s. The following ranges of parameters have been covered in this study: substrate size: 25–35 mm, die size: 6.19×7.81 mm (48 mm2 area) and 9.13×12.95 mm (118 mm2 area), underfill thermal conductivity: 0.6–3.0 W/(m K), C4 pitch: 250 μm and below, no thermal balls to 9×9 array of thermal balls on 1.27 mm square pitch, and with copper heat spreader on the back of a bare and an overmolded die. Based on our previous work, predictions in this study are expected to be within ±10% of measured data. The conclusions of the study are: (i) Thermal conductivity of the underfill in the range 0.6 to 10 W/(m K) has negligible effect on thermal performance of FC-PBGA packages investigated here. (ii) Thermal resistances decrease 12–15% as C4 pitch decreases below 250 μm. This enhancement is smaller with increase in die area. (iii) Thermal balls connected to the PTHs in the PWB decrease thermal resistance of the package by 10–15% with 9×9 array of thermal balls and PTHs compared to no thermal balls. The effect of die size on this enhancement is more noticeable on junction to board thermal resistance, Ψjb, than the other two package thermal metrics. (iv) Heat spreader on the back of the die decreases junction-to-ambient thermal resistance, Θja, by 6% in natural convection and by 25% in forced convection. (v) An overmolded die with a heat spreader provides better a thermal enhancement than a heat spreader on a bare die for freestream velocities up to about 1 m/s. Beyond 1 m/s, a heat spreader on bare die has better thermal performance.

Prediction of Thermal Performance of Wire-Bonded Plastic Ball Grid Array Package for Underhood Automotive Applications

2003 ◽  
Vol 125 (3) ◽  
pp. 447-455 ◽  
Author(s):  
K. Ramakrishna ◽  
J. R. Trent
Keyword(s):  
Thermal Conductivity ◽  
Natural Convection ◽  
Ambient Temperature ◽  
Thermal Performance ◽  
Ball Grid Array ◽  
Automotive Applications ◽  
Molding Compound ◽  
Wide Range ◽  
Plastic Ball ◽  
Plastic Ball Grid Array

Thermal performance of a three chip, overmolded wire-bonded plastic ball grid array (WB-PBGA) package with four layer substrate attached to a 1.52-mm-thick, four-layer (2s2p), FR4 printed wiring board (PWB) has been evaluated under horizontal natural convection conditions for underhood automotive applications as a function of ambient temperature, package design parameters, and thermophysical properties of the package and PWB materials. A two-tier modeling approach, which accurately accounts for multidimensional heat transfer effects caused by substrate features such as vias and C5 solder joints, has been developed and implemented. In this methodology, the effect of small features is first characterized using a detailed micromodel from which an effective thermal conductivity is computed. The effective thermal conductivity is implemented in the global model thereby excluding the small features in the global model. The actual stackups of the package and PWB have been used in the computations to accurately determine the in-plane heat spreading. Using this methodology for automotive underhood applications, a parametric study of thermal performance of the WB-PBGA package has been carried out. This study shows that: 1. The maximum junction temperature rise above ambient, ΔT, decreases with increase in ambient temperature by 30% as the ambient temperature increases from 23 to 125°C. 2. ΔT decreases by 20% as the emissivity of the molding compound and the PWB surfaces increases from 0 (no radiative loss) to 0.8 under natural convection conditions. 3. The decrease in ΔT is small (∼7%) as the thermal conductivity of the die attach material varies over a wide range. 4. ΔT decreases by 30% as the thermal conductivity of the molding compound is varied over a wide range. 5. ΔT decreases by 45% as the thermal conductivity of the substrate increases (i.e., as the number of vias in the substrate increase) from no vias case to densely populated vias.

Thermal Assessment and Enhancement of Molded Array (MAP) PBGA Packages for Handheld Telecommunication Applications

2000 ◽  
Author(s):  
V. H. Adams ◽  
V. A. Chiriac ◽  
T.-Y. Tom Lee
Keyword(s):  
Thermal Conductivity ◽  
Thermal Resistance ◽  
Effective Thermal Conductivity ◽  
Thermal Performance ◽  
Transfer Problem ◽  
Effective Area ◽  
Printed Wiring Board ◽  
Heat Spreader ◽  
Fine Pitch ◽  
Plastic Ball

Abstract Computational Fluid Dynamics (CFD) simulations were conducted to characterize the thermal performance of Molded Array Plastic Ball Grid Array (MAP PBGA) packages for hand-held applications. Due to size constraints, these PBGA packages tend to have fine pitch solder ball arrays and small overall size. Thermal analysis is required to assess the design risks associated with this trend toward smaller size and increasing power dissipation requirements. A conjugate heat transfer problem, in which radiative losses from the exposed surfaces of the package and the printed wiring board to the walls of the wind tunnel, was solved for horizontal natural convection cooling conditions. Thermal model assumptions and development for the MAP PBGA package are provided. The model is benchmarked with measurements obtained for a 64 I/O 0.8 mm pitch, 8 mm MAP PBGA. Predictions for junction-to-ambient thermal resistance were within 10% of measured values. Baseline simulations were conducted for 0.8 mm pitch MAP PBGA packages with substrate/die size combinations in the range of 6 to 12 mm substrate size and 3.81 to 7.62 mm die size. Junction-to-ambient thermal resistances varied over the range of 28.8 °C/W to 62.4 °C/W. Methods to improve thermal performance of these packages were investigated. Previous work indicated that effective conduction to the substrate by heat spreaders, metallic lids, mold compound, heat sinks, and their combinations promoted thermal performance. A necessary further step is to understand how effective area for heat spreading inside the package affects its thermal behavior, while varying the die size for package configurations with and without heat spreader. Studies were conducted to evaluate thermal performance improvement through the use of a copper heat spreader on the package top surface as it is affected by die size, package size, and substrate effective thermal conductivity. Substrate effective thermal conductivity is varied through the use of two and four layer substrates with thermal vias under the die. Results show a modest 1% to 15% reduction in junction-to-ambient thermal resistance for the MAP PBGA package sizes of interest.

Prediction of Thermal Performance of Flip-Chip-Plastic Ball Grid Array (FC-PBGA) Packages: Effect of Die Size

2001 ◽  
Author(s):  
K. Ramakrishna ◽  
T.-Y. Lee
Keyword(s):  
Forced Convection ◽  
Thermal Performance ◽  
Flip Chip ◽  
Ball Grid Array ◽  
Thermal Parameters ◽  
Freestream Velocity ◽  
Asymptotic Values ◽  
Wide Range ◽  
Plastic Ball ◽  
Plastic Ball Grid Array

Abstract Package level thermal performance of flip-chip plastic ball grid array (FC-PBGA) packages has been predicted using experimentally validated mechanistic methodologies. The resulting conjugate heat transfer models have been solved using methods of computational fluid dynamics under natural and forced convection for freestream velocities up to 2 m/s. Overall junction to ambient, Θja, junction-to-board, Ψjb, and junction to case Ψjτ thermal resistances (here after referred to as thermal parameters) have been derived from the results of these computations. Using these models and methodologies, which are previously validated against experimental data, a parametric study of effect of die size on the package thermal parameters has been carried out for die sizes in the range 2 to 20 mm (area of 4–400 mm2) under natural and forced convection with freestream velocities in the range of 0.5 to 2 m/s. The predictions in this study are expected to be ±10% of the measured data. Based on this work the following conclusions have been drawn: 1. The junction to ambient, Θja, and junction to board, Ψjb, thermal resistances decrease with increase in freestream velocity, U, and junction to case thermal resistance, Ψjτ, increases with U. Ψjb shows a weaker dependence on U than Θja does. 2. For a fixed substrate size, package thermal resistances, Θja and Ψjb, decrease as the die size increases from 2 mm (4 mm2) to 20 mm (400 mm2). However, these resistances reach asymptotic values for die sizes above 50 mm2. The change in these resistances is in the range 20% to 35% and the effect of freestream velocity on the percentage changes is small. 3. An extensive database of experimentally validated FC-PBGA package thermal parameters have been generated for a wide range of die sizes.

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