Percolation Theory Applied to Study the Effect of Shape and Size of the Filler Particles in Thermal Interface Materials

2000 ◽  
Author(s):  
Amit Devpura ◽  
Patrick E. Phelan ◽  
Ravi S. Prasher
Keyword(s):  
Percolation Theory ◽  
Flip Chip ◽  
Filler Concentration ◽  
Thermal Interface Materials ◽  
Thermal Interface ◽  
Chip Technology ◽  
The Matrix ◽  
Different Shapes ◽  
Filler Particles ◽  
Interface Materials

Abstract An important aspect in electronic packaging is the heat dissipation. Flip-chip technology is widely being used to increase the rate of heat transfer from the chip. A method to further enhance the thermal conductivity is by the use of a thermal interface material between the device and the heat sink attached to it in the flip-chip technology. Percolation theory holds a key to understanding the behavior of thermal interface materials. Percolation, used widely in electrical engineering, is a physical phenomenon in which the highly conducting particles distributed randomly in the matrix form at least one continuous chain connecting the opposite faces of the matrix. This phenomenon was simulated using the matrix method, to study the effect of different shapes and size of the filler particles. The different shapes considered were spherical, vertical or horizontal rods, and flakes in horizontal or vertical orientation. The effect of the size of these particles was also examined. The results indicate that the composites with particles having the largest side in the direction of heat flow will always have a better conductivity than the particles oriented normal to it. Also, from the results, we can choose the best filler size in the composite if we know the filler concentration we are aiming at.

Linear Assembly of Oxidized Surface Treated Nanodiamonds in Polymer-Based Nanohybrids by Electric Field Inducement

2013 ◽  
Vol 761 ◽  
pp. 107-111
Author(s):  
Son Thanh Nguyen ◽  
Hong Baek Cho ◽  
Tadachika Nakayama ◽  
Minh Triet Tan Huynh ◽  
Hisayuki Suematsu ◽  
...  
Keyword(s):  
Electric Field ◽  
Structural Variation ◽  
Oxidation Process ◽  
Semiconductor Industry ◽  
Thermal Interface Materials ◽  
Insulation Property ◽  
Thermal Interface ◽  
Linear Assembly ◽  
The Matrix ◽  
Interface Materials

Linear assembly of densely packed oxidized nanodiamonds (OxNDs) was achieved in polyepoxide-based nanohybrid films. A homogeneous suspension of pre-polymer of polyepoxide and OxNDs was cast onto a polyamide-spacer and subjected to an electric field in order to induce relocation and stretched-assembles of the fillers before the mixture became cross-linked. The OxNDs suspended readily, forming linear assemblies of OxNDs (LAOxNDs) of varying thicknesses, and aligned vertical to the film surfaces. Nanohybrid films with assemblies of LAOxNDs led to a significant enhancement in thermal conductivity while maintained the electrical insulation property of the polyepoxide. Mechanisms for the formation and structural variation of LAOxNDs in the matrix are elaborated regarding the improvement in physical properties. The present ambient-oxidation process and field-induced application are simple, but effective in enhancing the thermal properties of the polymer-based hybrids, and hence, promising for applications in the semiconductor industry, such as thermal interface materials.

Effect of h-BN/EP and BNNS/EP Composite Materials on the Reliability of Flip Chip

2021 ◽  
Author(s):  
ZK Li ◽  
Zhekun Fan ◽  
Long Dou ◽  
Zhong Jin ◽  
Zhan Liu ◽  
...  
Keyword(s):  
Thermal Conductivity ◽  
Finite Element ◽  
Current Density ◽  
Flip Chip ◽  
High Current Density ◽  
Electronic Devices ◽  
Thermal Interface Materials ◽  
High Current ◽  
Thermal Interface ◽  
Interface Materials

Abstract Under the action of electro-thermal-mechanical coupling, the failure and performance degradation of electronic devices are prone to occur, which has become a particularly important reliability problem in microelectronic packaging. The improvement of flip chip reliability by using thermal interface materials was studied. First, a three-dimensional finite element model of the flip-chip packaging system, and finite element simulation of electric-thermal-force multi-field coupling were conducted, and the Joule heating, temperature distribution, thermal stress and deformation of the flip-chip under high current density was analyzed. At the same time, the influence of thermal interface material thermal conductivity and operating current on flip chip reliability was studied. Then, the reliability experiment of the flip chip connected to the radiator under high current density was performed, and the temperature change in the flip chip under different thermal interface materials was obtained. Finally, through the combination of experiment and simulation, the influence of thermal interface materials on flip chip reliability was analyzed. It is further confirmed that the reliability and service life of electronic devices were effectively improved by using the high thermal conductivity BNNS/epoxy composite material prepared in this paper.

scholarly journals Globular Flower-Like Reduced Graphene Oxide Design for Enhancing Thermally Conductive Properties of Silicone-Based Spherical Alumina Composites

Nanomaterials ◽  
2020 ◽  
Vol 10 (3) ◽  
pp. 544
Author(s):  
Weijie Liang ◽  
Tiehu Li ◽  
Xiaocong Zhou ◽  
Xin Ge ◽  
Xunjun Chen ◽  
...  
Keyword(s):  
Thermal Conductivity ◽  
Graphene Oxide ◽  
Reduced Graphene Oxide ◽  
Thermal Interface Materials ◽  
Thermal Interface ◽  
Reduced Graphene ◽  
The Matrix ◽  
Thermally Conductive ◽  
Interface Materials ◽  
Spherical Alumina

The enhancement of thermally conductive performances for lightweight thermal interface materials is a long-term effort. The superb micro-structures of the thermal conductivity enhancer have an important impact on increasing thermal conductivity and decreasing thermal resistance. Here, globular flower-like reduced graphene oxide (GFRGO) is designed by the self-assembly of reduced graphene oxide (RGO) sheets, under the assistance of a binder via the spray-assisted method for silicone-based spherical alumina (S-Al2O3) composites. When the total filler content is fixed at 84 wt%, silicone-based S-Al2O3 composites with 1 wt% of GFRGO exhibit a much more significant increase in thermal conductivity, reduction in thermal resistance and reinforcement in thermal management capability than that of without graphene. Meanwhile, GFRGO is obviously superior to that of their RGO counterparts. Compared with RGO sheets, GFRGO spheres which are well-distributed between the S-Al2O3 fillers and well-dispersed in the matrix can build three-dimensional and isotropic thermally conductive networks more effectively with S-Al2O3 in the matrix, and this minimizes the thermal boundary resistance among components, owning to its structural characteristics. As with RGO, the introduction of GFRGO is helpful when decreasing the density of silicone-based S-Al2O3 composites. These attractive results suggest that the strategy opens new opportunities for fabricating practical, high-performance and light-weight filler-type thermal interface materials.

Manufacturability trade-offs of bare-die FCBGA package using thin or core-less substrate

2017 ◽  
Vol 2017 (DPC) ◽  
pp. 1-26
Author(s):  
Ankita Verma ◽  
Baqar Tabrez ◽  
Lam Duong ◽  
Martin Wuest
Keyword(s):  
Thermal Performance ◽  
Flip Chip ◽  
Material Selection ◽  
Full Range ◽  
Thermal Dissipation ◽  
Thermal Interface Materials ◽  
Assembly Process ◽  
Thermal Interface ◽  
Performance Requirement ◽  
Interface Materials

With the increasing demand for thinner packages and higher electrical & thermal performance requirement bare-die packaging is an inevitable trend that is growing. The assembly process for manufacturing of bare die in thin or core-less substrate FCBGA packages can be challenging especially considering the effects of substrate warpage during flip chip bonding and the excessive warpage of the flip chip package. We are evaluating the manufacturing risks during bare-die FCBGA package assembly to eliminate package warpage failures using experimental techniques and improve the functional performance of the flip chip package. Various substrate & under fill materials were tested for package warpage values for warpage-free control in the full range of temperature variation. Die designs at 28nm and 40nm process nodes are extremely complex in order to achieve the highest electrical & thermal performance requirement. Die design constraints on advanced process nodes necessitate increased thermal dissipation requirements thereby requiring investigation of thermal solutions utilizing thermal interface materials (TIM) with heat-sink. The interaction of such thermal solutions with the bare die packages is evaluated using various trial and error for material selection, experimental and simulation techniques to improve the assembly process. This study also focuses on selection of thermal interface materials [TIMs] and heat sinks which have considerable impact on die integrity during package assembly and/or during process of removal for failure analysis.

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