Sequential Reflow-Process Optimization to Reduce Die-Attach Solder Voids

2015 ◽  
Vol 137 (2) ◽  
Author(s):  
Youmin Yu ◽  
Victor Chiriac ◽  
Yingwei Jiang ◽  
Zhijie Wang
Keyword(s):  
Heat Transfer ◽  
Theoretical Prediction ◽  
Integrated Circuit ◽  
Sequential Optimization ◽  
Solder Paste ◽  
Lead Frame ◽  
Reflow Process ◽  
Sequential Method ◽  
Die Attach ◽  
Solder Reflow

Solder voids are detrimental to the thermal, mechanical, and reliability performance of integrated circuit (IC) packages and must be controlled within certain specifications. A sequential method of optimizing solder-reflow process to reduce die-attach solder voids in power quad flat no-lead (QFN) packages is presented. The sequential optimization consists, in turn, of theoretical prediction, heat transfer comparison, and experimental validation. First, the theoretical prediction uses calculations to find the optimal pause location and time for a lead frame strip (with dies bonded to it by solder paste) to receive uniform heat transfer during the solder-reflow stage. Next, reflow profiles at different locations on the lead frame strip are measured. Heat transfer during the reflow stage at these locations is calculated from the measured reflow profiles and is compared to each other to confirm the theoretical prediction. Finally, only a minimal number of actual trials are conducted to verify the predicted and confirmed optimal process. Since the theoretical prediction and heat transfer comparison screens out most of the unnecessary trials which must be conducted in common design of experiment (DoE) and trial-and-error methods, the sequential optimization method saves significant time and cost.

A Novel Approach to Optimizing Solder Reflow Process in Assembling PQFN Packages

2009 ◽  
Author(s):  
Youmin Yu ◽  
Y. Q. Su ◽  
S. A. Yao ◽  
Y. W. Jiang ◽  
Sonder Wang
Keyword(s):  
Optimal Transport ◽  
Void Formation ◽  
Present Approach ◽  
Solder Paste ◽  
Trial And Error ◽  
Lead Frame ◽  
Reflow Process ◽  
Novel Approach ◽  
Underlying Principle ◽  
Reliability Performance

Solder void is a common defect during assembling Power Quad Flat No-lead (PQFN) packages. It is detrimental to the packages’ feature of good power management and reliability performance and needs to be controlled within certain specification. Reflow process is well considered as critical to the solder void formation for a given solder paste. The transport index of reflow oven, which determines how solder paste are reflowed through solder reflowing process within the reflow oven, has therefore been optimized by a novel approach in this study. The underlying principle of the optimization is to find such a transport index that solder paste have a best possibility to experience homogeneous heat transfer during reflow phase of the whole reflow process. Different from the traditionally experimental trial and error, the present approach first predicts the optimal transport index by calculating the relative locations of lead frame (solder paste are dispensed on it) to the heating blocks of the reflow oven and the amount of heat input at different locations on the lead frame during the reflow phase. Then only necessary experiments are conducted to validate the prediction. As the theoretic calculations already screen out part of experiments that have to be conducted in the traditional trial and error, the present approach saves time and cost in practice.

Lead Frame Metal Migration in an Encapsulated IC Package

2008 ◽  
Author(s):  
William Eslinger
Keyword(s):  
Metal Oxide ◽  
Failure Mechanism ◽  
Integrated Circuit ◽  
Lead Frame ◽  
Low Resistance ◽  
Die Attach ◽  
Metal Migration ◽  
Silicon Device ◽  
Ic Package

Abstract This case study details a latent integrated circuit (IC) failure mechanism caused by the migration of silver (Ag) inside the encapsulated package of a CMOS (complementary metal-oxide-silicon) device. The plating of the lead frame was the source of the migrated silver, which was redeposited along the interface between the die attach epoxy and the plastic encapsulate. The resulting metallic ‘stringers’ bridged adjacent lead frame legs over distances greater than 150 μm and created relatively low-resistance paths capable of carrying 100’s of micro-amps.

CFD Modeling the Cooling Stage of Reflow Soldering Process

2016 ◽  
Author(s):  
Ana C. Ferreira ◽  
Senhorinha F. C. F. Teixeira ◽  
Ricardo F. Oliveira ◽  
Nelson J. Rodrigues ◽  
José C. F. Teixeira ◽  
...  
Keyword(s):  
Heat Transfer ◽  
Heat Dissipation ◽  
Convection Heat Transfer ◽  
Circuit Board ◽  
Cfd Modeling ◽  
Convection Flow ◽  
Solder Paste ◽  
Reflow Process ◽  
Cooling Process ◽  
Reflow Soldering

Reflow soldering is one of the most widespread soldering technologies used in the electronics industry. It is a method of attaching surface components to a circuit board with solder paste. The goal of the reflow process is to melt the solder and heat the adjoining surfaces, without overheating and damaging the electrical components. In the present study, computational fluid dynamics (CFD) was used to investigate the convection flow field during the cooling reflow process stage. The convection heat-transfer coefficient and temperature distribution within the board level were also studied. The analysis comprises three main objectives: (1) the simulation of the cooling process of a PCB in the final section of the reflow oven; (2) the calculation of the heat transfer from the PCB to the air as the PCB moves throughout the woven; and (3) use a “dummy” PCB with two generic components with different dimensions and analyze the heat dissipation. The geometry definition, the mesh generation, as well as the numerical simulations were carried out using the Workbench™ platform from ANSYS® 15. It was programmed an UDF to represent the relative motion between the PCB and the cooling air flow. Results shown that, during the cooling process, there is a gradient over the PCB board. It is also observed that there is a small differentiation in the temperatures’ profile along the board length probably because of the formation of recirculation areas inside the oven. Thus, nozzle spacing has a great impact in the formation of those recirculation areas, and consequently in heat dissipation.

Wettability of CNT-Doped Solder under Isothermal Aging

2016 ◽  
Vol 857 ◽  
pp. 76-78
Author(s):  
Norliza Ismail ◽  
Roslina Ismail ◽  
Nur Izni Abd Aziz ◽  
Azman Jalar
Keyword(s):  
Carbon Nanotubes ◽  
Contact Angle ◽  
Isothermal Aging ◽  
Optical Microscope ◽  
Image Analyzer ◽  
Solder Paste ◽  
Reflow Process ◽  
Weight Percentage ◽  
Test Board ◽  
Free Solder

Wettability for lead free solder 99.0Sn-0.3Ag-0.7Cu (SAC237) with addition of different weight percentage carbon nanotube after thermal treatment was investigated. SAC 237 solder powder with flux was mixed with 0.01%, 0.02%, 0.03% and 0.04% carbon nanotubes (CNTs) to form SAC-CNTs solder paste. Printed solder paste on test board with Cu surface finish was then reflow under 270°C temperature and isothermal aging at 150°C for 0,200 and 400 hours. Wettability of SAC-CNT solder was determined by measuring contact angle using optical microscope and image analyzer. As a result, from reflow process right through 400 hours of thermal aging, SAC237 with 0.04% CNT has the lowest contact angle as compared to other SAC-CNTs and SAC237 solder. As a conclusion, addition of carbon nanotubes into solder SAC237 improved their wettability on Cu substrate, especially at 0.04% of CNTs.

scholarly journals A Study on Heat Transfer from Small Heating Elements in an Integrated Circuit Chip.

1992 ◽  
Vol 58 (551) ◽  
pp. 2234-2240
Author(s):  
Takao NAGASAKI ◽  
Kazuyoshi FUSHINOBU ◽  
Kunio HIJIKATA ◽  
Ryo KURAZUME
Keyword(s):  
Heat Transfer ◽  
Integrated Circuit

scholarly journals Experimental Investigation of Embedded Micropin-Fins for Single-Phase Heat Transfer and Pressure Drop

2018 ◽  
Vol 140 (2) ◽  
Author(s):  
Chirag R. Kharangate ◽  
Ki Wook Jung ◽  
Sangwoo Jung ◽  
Daeyoung Kong ◽  
Joseph Schaadt ◽  
...  
Keyword(s):  
Heat Transfer ◽  
Pressure Drop ◽  
Friction Factor ◽  
Integrated Circuit ◽  
Single Phase ◽  
Absolute Error ◽  
Heat Fluxes ◽  
Operating Conditions ◽  
Working Fluid ◽  
Pin Fin

Three-dimensional (3D) stacked integrated circuit (IC) chips offer significant performance improvement, but offer important challenges for thermal management including, for the case of microfluidic cooling, constraints on channel dimensions, and pressure drop. Here, we investigate heat transfer and pressure drop characteristics of a microfluidic cooling device with staggered pin-fin array arrangement with dimensions as follows: diameter D = 46.5 μm; spacing, S ∼ 100 μm; and height, H ∼ 110 μm. Deionized single-phase water with mass flow rates of m˙ = 15.1–64.1 g/min was used as the working fluid, corresponding to values of Re (based on pin fin diameter) from 23 to 135, where heat fluxes up to 141 W/cm2 are removed. The measurements yield local Nusselt numbers that vary little along the heated channel length and values for both the Nu and the friction factor do not agree well with most data for pin fin geometries in the literature. Two new correlations for the average Nusselt number (∼Re1.04) and Fanning friction factor (∼Re−0.52) are proposed that capture the heat transfer and pressure drop behavior for the geometric and operating conditions tested in this study with mean absolute error (MAE) of 4.9% and 1.7%, respectively. The work shows that a more comprehensive investigation is required on thermofluidic characterization of pin fin arrays with channel heights Hf < 150 μm and fin spacing S = 50–500 μm, respectively, with the Reynolds number, Re < 300.

Evaluation of Epoxy Flux for Use in Hearing Aid SMD Assemblies

2013 ◽  
Vol 2013 (1) ◽  
pp. 000152-000157
Author(s):  
Susie Johansson ◽  
John Dzarnoski
Keyword(s):  
Integrated Circuits ◽  
Hearing Aids ◽  
Integrated Circuit ◽  
Hearing Aid ◽  
Single Step ◽  
Size Reduction ◽  
Circuit Board ◽  
Limiting Factor ◽  
Surface Mount ◽  
Die Attach

Miniaturization of everyday products has been driving sales for some time and continues to fuel the consumer market. Everyone expects size reduction with each new product generation [1], [2]. Almost everything has electronics inside that must get smaller. There is no market demanding smaller devices that are faster, more capable, more feature-rich than that of the hearing aid industry. While radios, Bluetooth wireless systems and other accessories are added to hearing instruments feature lists, the consumer nonetheless continues to wish for them to be even smaller. Advancements in circuit fabrication, component shrinkage and die consolidation have aided the industry in satisfying this need. However, as this demand continues and even intensifies, current surface mount device assembly materials are becoming inadequate and the limiting factor for overall circuit size reduction; specifically, the die attachment, protection and reinforcement process is limiting how small hearing aid circuits can be. For hearing aids, the addition of more features and connection to more accessories each require a number of integrated circuits and associated passives attached to a flexible circuit. These circuits are invariably bent and twisted during assembly, up to 180°, requiring the integrated circuit solder joints to be reinforced by underfilling to prevent detachment. Unfortunately, the underfilling process is time-consuming and the capillary action necessary for its success is finicky. Even more unfavorably, a designated “keep out” area for other components must surround the die to be underfilled to allow for the dispensing equipment to access the die, reducing the useable board space and limiting the overall possibility of circuit size reduction. Additionally, the underfill material must stay away from circuit board edges and areas to be bent during final assembly. In an attempt to increase useable circuit board space, decrease overall circuit board size, and reduce assembly steps, the application of two epoxy flux materials for die attach fluxing and underfilling of hearing aids was evaluated. Epoxy flux is a relatively new material, which combines the functionality of flux and underfill into a single step. Epoxy flux's application, while eliminating steps, would more significantly eliminate the necessary “keep out” areas around die and allow for more densely placed surface mount components. The epoxy flux materials were applied by both printing and dipping, and then evaluated using x-ray imaging, scanning acoustic microscope imaging, die peel testing, multiple reflow integrity testing and die shear testing.

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