Numerical and Experimental Study of Interface Delamination in Flip Chip BGA Package

2010 ◽  
Vol 132 (1) ◽  
Author(s):  
Hu Guojun ◽  
Andrew A. O. Tay ◽  
Luan Jing-En ◽  
Ma Yiyi
Keyword(s):  
Thermal Expansion ◽  
Material Properties ◽  
Flip Chip ◽  
Coefficient Of Thermal Expansion ◽  
Element Analysis ◽  
Epoxy Molding Compound ◽  
Molding Compound ◽  
Interface Delamination ◽  
Underfill Material ◽  
Die Thickness

The reliability of the flip chip package is strongly influenced by underfill, which has a much higher coefficient of thermal expansion (CTE) compared with other packaging materials and leads to large thermomechanical stresses developed during the assembly processes. Thermal expansion mismatch between different materials causes interface delamination between epoxy molding compound and silicon die as well as interface delamination between underfill and silicon die. The main objective of this study is to investigate the effects of underfill material properties, fillet height, and silicon die thickness on the interface delamination between epoxy molding compound and silicon die during a lead-free solder reflow process based on the modified virtual crack closure method. Based on finite element analysis and experiment study, it can be concluded that the energy release rates at reflow temperature are the suitable criteria for the estimation of interface delamination. Furthermore, it is found that underfill material properties (elastic modulus, CTE, and chemical cure shrinkage), fillet height, and silicon die thickness can be optimized to reduce the risk of interface delamination between epoxy molding compound and silicon die in the flip chip ball grid array package.

Application of an Epoxy Cap in a Flip-Chip Package Design

1989 ◽  
Vol 111 (1) ◽  
pp. 16-20 ◽  
Author(s):  
E. Suhir
Keyword(s):  
Thermal Expansion ◽  
Flip Chip ◽  
Coefficient Of Thermal Expansion ◽  
Preliminary Test ◽  
Elastic Stability ◽  
Thermally Induced ◽  
Package Design ◽  
Silicone Gels ◽  
Low Modulus ◽  
Supporting Frame

In order to combine the merits of epoxies, which provide good environmental and mechanical protection, and the merits of silicone gels, resulting in low stresses, one can use an encapsulation version, where a low modulus gel is utilized as a major encapsulant, while epoxy is applied as a protecting cap. Such an encapsulation version is currently under consideration, parallel with a metal cap version, for the Advanced VLSI package design which is being developed at AT&T Bell Laboratories. We recommend that the coefficient of thermal expansion for the epoxy be somewhat smaller than the coefficient of thermal expansion for the supporting frame. In this case the thermally induced displacements would result in a desirable tightness in the cap/frame interface. This paper is aimed at the assessment of stresses, which could arise in the supporting frame and in the epoxy cap at low temperatures. Also, the elastic stability of the cap, subjected to compression, is evaluated. The calculations were executed for the Advanced VLSI package design and for a Solder Test Vehicle (STV), which is currently used to obtain preliminary information regarding the performance of the candidate encapsulants. It is concluded that in order to avoid buckling of the cap, the latter should not be thinner than 15 mils (0.40 mm) in the case of VLSI package design and than 17.5 mils (0.45 mm) in the case of STV. At the same time, the thickness of the cap should not be greater than necessary, both for smaller stresses in the cap and for sufficient undercap space, required for wirebond encapsulation. The obtained formulas enable one to evaluate the actual and the buckling stresses. Preliminary test data, obtained by using STV samples, confirmed the feasibility of the application of an epoxy cap in a flip-chip package design.

Role of Out-of-Plane Coefficient of Thermal Expansion in Electronic Packaging Modeling

1999 ◽  
Vol 122 (2) ◽  
pp. 121-127 ◽  
Author(s):  
Manjula N. Variyam ◽  
Weidong Xie ◽  
Suresh K. Sitaraman
Keyword(s):  
Thermal Expansion ◽  
Electronic Packaging ◽  
Thermal Loading ◽  
Coefficient Of Thermal Expansion ◽  
Plane Deformation ◽  
Three Dimensional ◽  
Dissimilar Materials ◽  
3D Models ◽  
Material Behavior ◽  
Element Analysis

Components in electronic packaging structures are of different dimensions and are made of dissimilar materials that typically have time, temperature, and direction-dependent thermo-mechanical properties. Due to the complexity in geometry, material behavior, and thermal loading patterns, finite-element analysis (FEA) is often used to study the thermo-mechanical behavior of electronic packaging structures. For computational reasons, researchers often use two-dimensional (2D) models instead of three-dimensional (3D) models. Although 2D models are computationally efficient, they could provide misleading results, particularly under thermal loading. The focus of this paper is to compare the results from various 2D, 3D, and generalized plane-deformation strip models and recommend a suitable modeling procedure. Particular emphasis is placed to understand how the third-direction coefficient of thermal expansion (CTE) influences the warpage and the stress results predicted by 2D models under thermal loading. It is seen that the generalized plane-deformation strip models are the best compromise between the 2D and 3D models. Suitable analytical formulations have also been developed to corroborate the findings from the study. [S1043-7398(00)01402-X]

Warpage Simulation During Fan-Out Wafer-Level Packaging Process with Uncertainty of Material Properties

2021 ◽  
Vol 21 (5) ◽  
pp. 2987-2991
Author(s):  
Geumtaek Kim ◽  
Daeil Kwon
Keyword(s):  
Finite Element Analysis ◽  
Finite Element ◽  
Material Properties ◽  
Coefficient Of Thermal Expansion ◽  
Input Output ◽  
Wafer Level ◽  
High Input ◽  
Element Analysis ◽  
Packaging Process ◽  
Wafer Level Packaging

Along with the reduction in semiconductor chip size and enhanced performance of electronic devices, high input/output density is a desired factor in the electronics industry. To satisfy the high input/output density, fan-out wafer-level packaging has attracted significant attention. While fan-out wafer-level packaging has several advantages, such as lower thickness and better thermal resistance, warpage is one of the major challenges of the fan-out wafer-level packaging process to be minimized. There have been many studies investigating the effects of material properties and package design on warpage using finite element analysis. Current warpage simulations using finite element analysis have been routinely conducted with deterministic input parameters, although the parameter values are uncertain from the manufacturing point of view. This assumption may lead to a gap between the simulation and the field results. This paper presents an uncertainty analysis of wafer warpage in fan-out wafer-level packaging by using finite element analysis. Coefficient of thermal expansion of silicon is considered as a parameter with uncertainty. The warpage and the von Mises stress are calculated and compared with and without uncertainty.

Experiment and Numerical Analysis of the Residual Stresses in Underfill Resins for Flip Chip Package Applications

2005 ◽  
Vol 127 (1) ◽  
pp. 47-51 ◽  
Author(s):  
Man-Lung Sham ◽  
Jang-Kyo Kim
Keyword(s):  
Numerical Analysis ◽  
Residual Stresses ◽  
Integrated Circuit ◽  
Flip Chip ◽  
Coefficient Of Thermal Expansion ◽  
Flexural Modulus ◽  
Curing Temperature ◽  
Electronic Packages ◽  
Element Analysis ◽  
Plastic Package

Polymeric encapsulant is widely used to protect the integrated circuit chips and thus to enhance the reliability of electronic packages. Residual stresses are introduced in the plastic package when the polymer is cooled from the curing temperature to ambient, from which many reliability issues arise, including warpage of the package, premature interfacial failure, and degraded interconnections. Bimaterial strip bending experiment has been employed successfully to monitor the evolution of the residual stresses in underfrill resins for flip chip applications. A numerical analysis is developed to predict the residual stresses, which agree well with the experimental measurements. The changes of material properties, such as flexural modulus and coefficient of thermal expansion, of the resins with temperature are taken into account in the finite element analysis.

scholarly journals The Use of Recycled Carpet in Low-Cost Composite Tooling Materials

Recycling ◽  
2019 ◽  
Vol 4 (1) ◽  
pp. 12 ◽  
Author(s):  
Kunal Mishra ◽  
Sarat Das ◽  
Ranji Vaidyanathan
Keyword(s):  
Mechanical Properties ◽  
Thermal Expansion ◽  
Material Properties ◽  
Coefficient Of Thermal Expansion ◽  
Low Cost ◽  
Value Engineering ◽  
Compressive Properties ◽  
Structural Composites ◽  
Environmental Deterioration ◽  
Composite Tooling

More than 250,000 metric tons (600 million pounds) of carpet are dumped in landfills every year. That creates a significant concern regarding environmental deterioration and economic liability. It is therefore imperative to develop sustainable post-consumer carpet-based products for high-value engineering applications such as composite tooling. To be considered as an acceptable composite tooling material, the composite needs to meet certain required properties such as a low coefficient of thermal expansion, excellent compressive properties, and high a hardness value after repeated exposure to curing cycles. The tooling composites must also exhibit the ability to endure several curing cycles, without deteriorating the mechanical properties. In the present investigation, post-consumer carpet has been recycled in the form of structural composites for tooling applications. The recycled carpet composites have been reinforced with 0.5 wt.% of graphene nanoplatelets to modify the material properties of the carpet composites. The results from compressive and hardness experiments demonstrate that the recycled carpet preserved its mechanical integrity even after several curing cycles. This indicates that recycled carpet composites have the potential to be a low-cost composite tooling alternative for the industry.

Underfill Assessments and Validations for Low-k FCBGA

2006 ◽  
Author(s):  
Nicholas Kao ◽  
Jeng Yuan Lai ◽  
Jase Jiang ◽  
Yu Po Wang ◽  
C. S. Hsiao
Keyword(s):  
Finite Element ◽  
High Speed ◽  
Flip Chip ◽  
Failure Modes ◽  
Solder Bump ◽  
Material Selection ◽  
Coefficient Of Thermal Expansion ◽  
Electrical Performance ◽  
Low K ◽  
Underfill Material

With the trend of electronic consumer product toward more functionality, high performance and miniaturization, IC chip is required to deliver more I/Os signals and better electrical characteristics under same package form factor. Thus, Flip Chip BGA (FCBGA) package was developed to meet those requirements offering better electrical performance, more I/O pins accommodation and high transmission speed. For high-speed application, the low dielectric constant (low-k) material that can effectively reduce the signal delays is extensively used in IC chips. However, the low-k material possesses fragile mechanical property and high coefficient of thermal expansion (CTE) compared with silicon chip, which raises the reliability concerns of low-k material integrated into IC chip. The typical reliability failure modes are low-k layer delamination and bump crack under temperature loading during assembly and reliability test. Delamination is occurred in the interface between low-k dielectric layers and underfill material at chip corner. Bump crack is at Under Bump Metallization (UBM) corner. Thus, the adequate underfill material selection becomes very important for both solder bump and low-k chips [1]. This paper mainly characterized FCBGA underfill materials to guide the adequate candidates to prevent failures on low-k chip and solder bump. Firstly, test vehicle was a FCBGA package with heat spreader and was investigated the thermal stress by finite element models. In order to analyze localized low-k structures, sub-modeling technique is used for underfill characterizations. Then, the proper underfill candidates picked from modeling results were experimentally validated by reliability tests. Finally, various low-k FCBGA package structures were also studied with same finite element technique.

A General Solution for the Elastoplastic Thermal Stresses in a Strain-Hardening Plate With Arbitrary Material Properties

1962 ◽  
Vol 29 (1) ◽  
pp. 151-158 ◽  
Author(s):  
A. Mendelson ◽  
S. W. Spero
Keyword(s):  
Thermal Expansion ◽  
General Solution ◽  
Strain Hardening ◽  
Material Properties ◽  
Thermal Stresses ◽  
Coefficient Of Thermal Expansion ◽  
Stress And Strain ◽  
Linear Strain ◽  
Hardening Material ◽  
General Method

A general method is presented for obtaining the elastoplastic stress and strain distributions in a thermally stressed plate of a strain-hardening material with temperature-varying modulus, yield point, and coefficient of thermal expansion. It is shown that for linear strain-hardening the solution can often be obtained in closed form. It is indicated that the error due to neglecting strain-hardening may sometimes be appreciable. The assumption that the total strain remains the same as that computed elastically (strain invariance) often leads to smaller errors than the neglect of strain-hardening.

Effect of Underfill Thermomechanical Properties on Thermal Cycling Fatigue Reliability of Flip-Chip Ball Grid Array

2004 ◽  
Vol 126 (4) ◽  
pp. 560-564 ◽  
Author(s):  
Tong Hong Wang ◽  
Yi-Shao Lai ◽  
Jenq-Dah Wu
Keyword(s):  
Flip Chip ◽  
Coefficient Of Thermal Expansion ◽  
Ball Grid Array ◽  
Thermomechanical Properties ◽  
Creep Model ◽  
Fatigue Reliability ◽  
Element Analysis ◽  
Dimensional Finite Element ◽  
Real Behavior ◽  
Thermal Cycling Fatigue

Plane two-dimensional finite element analysis was applied to study the effect of underfill thermomechanical properties on the potential of thermal fatigue failure for flip-chip ball grid array. Two-stage as well as constant thermomechanical properties of underfills were manipulated to represent extremes of practical underfills. The steady-state creep model was incorporated for the eutectic solder bump to represent its real behavior. It was found from the parametric studies that the underfill with high Young’s modulus, low coefficient of thermal expansion, and high glass transition temperature leads to the longest service life.

Strength Analysis of Epoxy Molding Compound Module Using Automated FEA System

2014 ◽  
Vol 670-671 ◽  
pp. 852-855
Author(s):  
Joon Seong Lee ◽  
Hee Rok Hong ◽  
Gye Hyun Jo ◽  
Dong Keun Park
Keyword(s):  
Lithium Ion ◽  
Rechargeable Batteries ◽  
Strength Analysis ◽  
Battery Life ◽  
Thin Wall ◽  
Element Analysis ◽  
Epoxy Molding Compound ◽  
Molding Compound ◽  
Finite Element Analysis Simulation ◽  
Analysis System

Recently, consumers are often dissatisfied with the battery life from even the most advanced lithium-ion rechargeable batteries in mobile phone. A mobile battery was chosen in this study because it is the flat plate of small thin wall which is expected to have some flexing. It is required to be evaluated and designed considering the coupled phenomena. Especially, this paper describes finite element analysis simulation of strength evaluation for epoxy molding compound module using automated FE analysis system.

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