A Novel Projection Moiré System for Measuring PWBA Warpage Using Simulated Optimized Convective Reflow Process

2009 ◽  
Vol 131 (2) ◽  
Author(s):  
Reinhard E. Powell ◽  
I. Charles Ume
Keyword(s):  
Measurement System ◽  
Flip Chip ◽  
Active Contours ◽  
Printed Wiring Board ◽  
Reflow Process ◽  
Shadow Moire ◽  
Shadow Moiré ◽  
Plastic Ball ◽  
Wiring Board ◽  
Projection Moire

The shadow moiré technique is a widely used method of measuring printed wiring board (PWB) warpage. It has a high resolution, high accuracy, and is suitable for use in an online environment. The shortcoming of the shadow moiré technique is that it cannot be used to measure PWBs populated with chip packages. In this paper, a novel warpage measurement system based on the projection moiré technique is presented. The system can be used to measure bare PWBs, as well as PWBs populated with chip packages. In order to use the projection moiré system to accurately determine the warpage of PWBs and chip packages separately, an automated chip package detection algorithm based on active contours is utilized. Unlike the shadow moiré technique, which uses a glass grating, the projection moiré technique uses a virtual grating. The virtual grating sizes can be adjusted, making it versatile for measuring various PWB and chip package sizes. Without the glass grating, which is a substantial heat inertia, the PWB/printed wiring board assembly (PWBA) sample can be heated more evenly during the thermal process. The projection moiré system described in this paper can also be used to measure the warpage of PWBs/PWBAs/chip packages during convective reflow processes. In this paper, the characteristics of the projection moiré warpage measurement system will be described. In addition, the system will be used to measure the warpage of a PWB and plastic ball grid array packages during a Lee optimized convective reflow process (Lee, N.-C., 2002, Reflow Soldering Processes and Troubleshooting SMT, BGA, CSP, and Flip Chip Technologies, Butterworth-Heinemann, MA). It is concluded that this projection moiré warpage measurement system is a powerful tool to study the warpage of populated PWBs during convective reflow processes.

A Novel Projection Moire´ System for Measuring PWBA Warpage During Simulated Optimized Convective Reflow Process

2006 ◽  
Author(s):  
Reinhard E. Powell ◽  
Wei Tan ◽  
I. Charles Ume
Keyword(s):  
Measurement System ◽  
Active Contours ◽  
Detection Algorithm ◽  
Printed Wiring Board ◽  
Reflow Process ◽  
Heat Inertia ◽  
Shadow Moire ◽  
Shadow Moiré ◽  
Plastic Ball ◽  
Projection Moire

The shadow moire´ technique is a widely used method of measuring printed wiring board (PWB) warpage. It has a high resolution, high accuracy and is suitable for use in an online environment. A shortcoming of the shadow moire´ technique is that it cannot be used to measure PWBs populated with chip packages. In this paper, a novel warpage measurement system based on the projection moire´ technique is presented. The system can be used to measure bare PWBs as well as PWBs populated with chip packages. In order to use the projection moire´ system to accurately determine the warpage of PWBs and chip packages separately, an automated chip package detection algorithm based on active contours is utilized. Unlike the shadow moire´ technique which uses a glass grating, the projection moire´ technique uses a virtual grating. The virtual grating sizes can be adjusted, making it versatile for measuring various PWB and chip package sizes. Without the glass grating, which is a substantial heat inertia, the PWB/PWBA/chip package sample can be heated more evenly during the thermal process. The projection moire´ system described in this paper can also be used to measure PWB/PWBA/chip package warpage during convective reflow processes. In this paper, the characteristics of the projection moire´ warpage measurement system will be described. In addition, the system will be used to measure the warpage of a PWB and plastic ball grid array (PBGA) packages during a Lee optimized convective reflow process. It is concluded that this projection moire´ warpage measurement system is a powerful tool to study the warpage of populated PWBs during convective reflow processes.

Experimental and Numerical Study of the Effect of Plastic Ball Grid Array Package Placement on PWB Warpage During Convective Solder Reflow

2006 ◽  
Author(s):  
Reinhard E. Powell ◽  
Wei Tan ◽  
I. Charles Ume
Keyword(s):  
Finite Element ◽  
Electronic Packaging ◽  
Ball Grid Array ◽  
Interfacial Stress ◽  
Printed Wiring Board ◽  
Plastic Ball ◽  
Plastic Ball Grid Array ◽  
Cte Mismatch ◽  
Wiring Board ◽  
Projection Moire

Warpage has long been known to cause thermomechanical reliability problems in electronic packaging. The coefficient of thermal expansion (CTE) mismatch between different materials in an electronic assembly such as solder, copper, FR-4, encapsulation molding, and silicon is known to be one of the leading causes of manufacturing defects and fatigue failures. The CTE mismatch between packaging materials induces thermomechanical stresses at interfaces between the materials. Warpage is a global effect of interfacial stress and displacement. The warpage problem in electronic packaging can be further aggravated by thermal processes such as reflow and temperature cycling. In a printed wiring board assembly (PWBA), warpage of the PWB or chip packages may result in chip package misregistration, solder joint failure, die cracking and delamination of the solder bumps between chip packages and the PWB. In this paper, the warpage of a printed wiring board assembly (PWBA) is studied using projection moire´ experimental measurements and a finite element model. The effects of plastic ball grid array (PBGA) chip package placement on PWB warpage during convective reflow will be evaluated. The projection moire´ experimental warpage results will show that the number of PBGA chip packages as well as their location has an effect on the warpage of the PWB. In addition to the experimental results, the finite element warpage results will be used to make recommendations on the optimal PBGA package placement locations on the PWB to minimize PWB warpage during reflow processes.

Warpage measurement comparison using shadow Moire and projection Moire methods

2002 ◽  
Vol 25 (4) ◽  
pp. 714-721 ◽  
Author(s):  
Hai Ding ◽  
R.E. Powell ◽  
C.R. Hanna ◽  
I.C. Ume
Keyword(s):  
Shadow Moire ◽  
Shadow Moiré ◽  
Projection Moire

Effective Thermal Conductivity of Six Sigma’s Copper Reinforced Column Grid Array Interconnect for Ceramic Microelectronic Packages

2010 ◽  
Author(s):  
Mark Eblen
Keyword(s):  
Thermal Conductivity ◽  
Integrated Circuits ◽  
Effective Thermal Conductivity ◽  
Flip Chip ◽  
Heat Removal ◽  
Thermal Design ◽  
Printed Wiring Board ◽  
Wiring Board ◽  
High Lead

Thermal management of flip chip style integrated circuits often relies on thermal conduction through the ceramic package and high lead solder grid array leads into the printed wiring board as the primary path for heat removal. Thermal analysis of this package configuration requires accurate characterization of the sometimes geometrically complex package-to-board interface. Given the unique structure of the Six Sigma column grid array (CGA) interconnect, a detailed finite element submodel was used to numerically derive the effective thermal conductivity with comparisons to a conventional CGA interconnect. Once an effective thermal conductivity value is obtained, the entire interconnect layer can be represented as a fictitious cuboid layer for inclusion in a more traditional “closed-form” thermal resistance calculation. This method allows the package designer a quick and robust method to evaluate initial thermal design study tradeoffs.

Warpage Measurement Using Projection Moire´ System and Two Automatic Image Segmentation Algorithms

2007 ◽  
Author(s):  
Wei Tan ◽  
I. Charles Ume
Keyword(s):  
Image Segmentation ◽  
Electronic Packages ◽  
Printed Wiring Board ◽  
Segmentation Algorithms ◽  
Out Of Plane ◽  
Cte Mismatch ◽  
Image Models ◽  
Wiring Board ◽  
Plane Displacement ◽  
Projection Moire

Out-of-plane displacement (warpage) has been a major reliability concern for board-level electronic packaging. Printed wiring board (PWB) and component warpage results from CTE mismatch among the materials that make up the PWB assembly (PWBA). Warpage occurring during surface-mount assembly reflow processes and normal operations may lead to serious reliability problems. In this paper, a projection moire´ warpage measurement system and two types of automatic image segmentation algorithms were presented. In order to use the projection moire´ technique to separately determine the warpage of a PWB and assembled electronic packages in a PWBA, two image segmentation algorithms based on mask image models and active contour models (snakes) were developed. They were used to detect package locations in a PWBA displacement image generated by the projection moire´ system. The performances of the mask image and snake approaches based on their resolutions, processing rates, and measurement efficiencies were evaluated in this research. Real-time composite Hermite surface models were constructed to estimate the PWB warpage values underneath the electronic packages. The above automatic image segmentation algorithms were integrated with the projection moire´ system to accurately evaluate the warpage of PWBs and assembled chip packages individually.

Evaluation of Thermal Enhancements to Flip-Chip-Plastic Ball Grid Array Packages

2004 ◽  
Vol 126 (4) ◽  
pp. 449-456 ◽  
Author(s):  
K. Ramakrishna ◽  
T.-Y. Tom Lee
Keyword(s):  
Thermal Conductivity ◽  
Thermal Resistance ◽  
Forced Convection ◽  
Thermal Performance ◽  
Flip Chip ◽  
Transfer Problem ◽  
Printed Wiring Board ◽  
Heat Spreader ◽  
Plastic Ball ◽  
Ball Grid Array Packages

Enhancements to thermal performance of FC-PBGA packages due to underfill thermal conductivity, controlled collapse chip connection (C4) pitch, package to printed wiring board (PWB) interconnection through thermal balls, a heat spreader on the backside of the die, and an overmolded die with and without a heat spreader have been studied by solving a conjugate heat transfer problem. These enhancements have been investigated under natural and forced convection conditions for freestream velocities up to 2 m/s. The following ranges of parameters have been covered in this study: substrate size: 25–35 mm, die size: 6.19×7.81 mm (48 mm2 area) and 9.13×12.95 mm (118 mm2 area), underfill thermal conductivity: 0.6–3.0 W/(m K), C4 pitch: 250 μm and below, no thermal balls to 9×9 array of thermal balls on 1.27 mm square pitch, and with copper heat spreader on the back of a bare and an overmolded die. Based on our previous work, predictions in this study are expected to be within ±10% of measured data. The conclusions of the study are: (i) Thermal conductivity of the underfill in the range 0.6 to 10 W/(m K) has negligible effect on thermal performance of FC-PBGA packages investigated here. (ii) Thermal resistances decrease 12–15% as C4 pitch decreases below 250 μm. This enhancement is smaller with increase in die area. (iii) Thermal balls connected to the PTHs in the PWB decrease thermal resistance of the package by 10–15% with 9×9 array of thermal balls and PTHs compared to no thermal balls. The effect of die size on this enhancement is more noticeable on junction to board thermal resistance, Ψjb, than the other two package thermal metrics. (iv) Heat spreader on the back of the die decreases junction-to-ambient thermal resistance, Θja, by 6% in natural convection and by 25% in forced convection. (v) An overmolded die with a heat spreader provides better a thermal enhancement than a heat spreader on a bare die for freestream velocities up to about 1 m/s. Beyond 1 m/s, a heat spreader on bare die has better thermal performance.

System for Real-Time Measurement of Thermally Induced PWB/PWA Warpage

1997 ◽  
Vol 119 (1) ◽  
pp. 1-7 ◽  
Author(s):  
M. R. Stiteler ◽  
I. C. Ume
Keyword(s):  
Real Time ◽  
Measurement System ◽  
Printed Wiring Board ◽  
Reflow Soldering ◽  
Thermally Induced ◽  
Operational Conditions ◽  
Soldering Process ◽  
Before And After ◽  
On Line ◽  
Wiring Board

An automated on-line warpage measurement system for printed wiring board assemblies (PWBAs) has been developed. The system is capable of simulating an infrared reflow soldering process and performing real-time PWBA warpage measurements using the shadow moire´ technique. The system can be used to characterize the warpage behavior of virtually any PWBA during infrared soldering processes as well as during operational conditions. Using this system, warpage of PWB test vehicles was measured during simulated infrared reflow soldering. The measurement results and the measurement system will be presented. The measured warpage varied significantly during reflow soldering from that observed both before and after reflow. These results help us to understand how the board deforms at every stage of the reflow process.

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