A Method for Estimating and Compensating Quasistatic Errors of Machine Tools

1993 ◽  
Vol 115 (1) ◽  
pp. 149-159 ◽  
Author(s):  
P. M. Ferreira ◽  
C. Richard Liu

Quasistatic errors are the major contributors to positioning inaccuracies of machine tools. These errors, estimated to account for 70 percent of the errors of the machine, have been observed to be as high as 70 to 120 μm for production class machining centers. In this paper, a model for these errors is developed. Further, it is shown that the parameters for this model can be estimated by the observation of a few (nine) error vectors in the machine’s workspace. These two results form the basis for a viable error compensation scheme; the model for error compensation and the parameter estimation for updating the model. Experimental results verify the validity of the approach. An order-of-magnitude improvement in the accuracy of the machine, with respect to a calibration frame, was observed.

1998 ◽  
Vol 545 ◽  
Author(s):  
Ali Shakouri ◽  
Chris LaBounty ◽  
Patrick Abraham ◽  
Joachim Piprek ◽  
John E. Bowers

AbstractThermionic emission current in heterostructures can be used to enhance thermoelectric properties beyond what can be achieved with conventional bulk materials. The Bandgap discontinuity at the junction between two materials is used to selectively emit hot electrons over a barrier layer from cathode to anode. This evaporative cooling can be optimized at various temperatures by adjusting the barrier height and thickness. Theoretical and experimental results for nonisothermal thermionic emission in heterostructures are presented. Single stage InGaAsP-based heterostructure integrated thermionic (HIT) coolers are fabricated and characterized. Cooling on the order of a degree over one micron thick barriers has been observed. Nonisothermal transport in highly doped tall barrier superlattices is also investigated. An order of magnitude improvement in cooling efficiency is predicted for InAlAs/InP superlattices.


2000 ◽  
Author(s):  
Jianming Yu ◽  
C. James Li

Abstract This paper describes a new control strategy for the micro positioning system used in a diamond turning process to improve workpiece geometry in spite of hysteresis nonlinearity and guideway/spindle errors. The control strategy consists of two nested loops. The inner loop is a model-based robust controller, which compensates for the hysteresis nonlinearity associated with piezo actuators, and the outer loop is a P-integrator learning controller which eliminates the unmodeled error sources such as guideway and spindle errors. This control strategy was applied to the error compensation in a diamond turning process. Cutting tests were conducted and showed an order of magnitude improvement in the workpiece form accuracy from 10 μm to 1μm on an aluminum alloy disk.


1992 ◽  
Vol 114 (4) ◽  
pp. 476-480 ◽  
Author(s):  
C. J. Li ◽  
S. Y. Li

The work described is the result of a research project for developing a roundness error compensation scheme in turning processes based on the p-integrator learning controller and an on-line metrology system. The objective is to eliminate the repeatable error in turning operations. The scheme was realized on a CNC lathe. The effectiveness of the scheme is supported by the experimental results obtained through workpiece inspections.


2020 ◽  
Author(s):  
Xiaoyuan Wang ◽  
Pengfei Zhou ◽  
Jason Eshraghian ◽  
Chih-Yang Lin ◽  
Herbert Ho-Ching Iu ◽  
...  

<div>This paper presents the first experimental demonstration</div><div>of a ternary memristor-CMOS logic family. We systematically</div><div>design, simulate and experimentally verify the primitive</div><div>logic functions: the ternary AND, OR and NOT gates. These are then used to build combinational ternary NAND, NOR, XOR and XNOR gates, as well as data handling ternary MAX and MIN gates. Our simulations are performed using a 50-nm process which are verified with in-house fabricated indium-tin-oxide memristors, optimized for fast switching, high transconductance, and low current leakage. We obtain close to an order of magnitude improvement in data density over conventional CMOS logic, and a reduction of switching speed by a factor of 13 over prior state-of-the-art ternary memristor results. We anticipate extensions of this work can realize practical implementation where high data density is of critical importance.</div>


The system of route correction of an unmanned aerial vehicle (UAV) is considered. For the route correction the on-board radar complex is used. In conditions of active interference, it is impossible to use radar images for the route correction so it is proposed to use the on-board navigation system with algorithmic correction. An error compensation scheme of the navigation system in the output signal using the algorithm for constructing a predictive model of the system errors is applied. The predictive model is building using the genetic algorithm and the method of group accounting of arguments. The quality comparison of the algorithms for constructing predictive models is carried out using mathematical modeling.


2014 ◽  
Vol 2014 ◽  
pp. 1-14 ◽  
Author(s):  
Quanjun Yin ◽  
Long Qin ◽  
Xiaocheng Liu ◽  
Yabing Zha

In robotics, Generalized Voronoi Diagrams (GVDs) are widely used by mobile robots to represent the spatial topologies of their surrounding area. In this paper we consider the problem of constructing GVDs on discrete environments. Several algorithms that solve this problem exist in the literature, notably the Brushfire algorithm and its improved versions which possess local repair mechanism. However, when the area to be processed is very large or is of high resolution, the size of the metric matrices used by these algorithms to compute GVDs can be prohibitive. To address this issue, we propose an improvement on the current algorithms, using pointerless quadtrees in place of metric matrices to compute and maintain GVDs. Beyond the construction and reconstruction of a GVD, our algorithm further provides a method to approximate roadmaps in multiple granularities from the quadtree based GVD. Simulation tests in representative scenarios demonstrate that, compared with the current algorithms, our algorithm generally makes an order of magnitude improvement regarding memory cost when the area is larger than210×210. We also demonstrate the usefulness of the approximated roadmaps for coarse-to-fine pathfinding tasks.


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