Quantitative Characterization of a Flip-Chip Solder Joint

1995 ◽  
Vol 62 (2) ◽  
pp. 390-397 ◽  
Author(s):  
S. K. Patra ◽  
S. S. Sritharan ◽  
Y. C. Lee

Based on an energy minimization principle, a mathematical/numerical model has been developed to study the impact of design and process variations associated with flip-chip solder joint on its ability to align in lateral and axial direction. The minimum-energy shape needed for joint evaluation is computed by a novel numerical method based on motion by mean curvature. The analysis shows that (1) the magnitude of the reaction force in lateral and axial direction reduces with increase in solder volume, (2) the normal reaction is an order of magnitude higher compared to the lateral reaction (restoring force) thus making the joint more susceptible to lateral misalignment compared to the axial misalignment, and (3) the axial misalignment is primarily dictated by the accuracy of the solder deposition height.

Author(s):  
Keh Shin Beh ◽  
Wei Keat Loh ◽  
Jenn Seong Leong ◽  
Wooi Aun Tan

FCBGA is an electronic package used to achieve a high Inputs/Outputs (I/Os). To continue to achieve a higher I/O count without increasing package size, ball pitch reduction is inevitable. However, ball pitch reduction using smaller ball size has posed substantial challenges to solder joint reliability (SJR). On top of that, rising power dissipation requirement in FCBGA package has created a need for high performance heat sinks. These heat sinks require significant compression loading to ensure good thermal conductance of thermal interface materials. The impact of these loads on SJR has typically not been considered in thermal cycle stressing. Hence, this paper focuses on different types of heat sinks and their compressive load effect on solder joint thermal fatigue performance. It also covers package size and board thickness effect when heat sink compressive load is taken into account during thermal stressing. Lastly, lead free and eutectic solders at sub 1.00mm ball pitch technology were also evaluated.


Author(s):  
Kayleen L. E. Helms ◽  
Betty Phillips

A characterization study is undertaken to monitor damage progression at the second-level interconnect in BGA’s on flip-chip electronic packages. Specifically, the progression of solder joint cracking under use conditions (thermal and combined thermomechanical loading) is investigated. The study uses a multi-color dye and peel failure analysis technique to track the initiation and propagation of solder joint cracks under loading. The approach being used differs from conventional failure analysis techniques in that multiple measurements of damage growth are obtained from the same part providing a full damage history. By using multiple dye colors, all crack initiation points, directions of propagation, and surface crack areas are obtainable experimentally. The scope of the study includes investigating the impact of such factors as die size, package size, BGA size, BGA pitch, enabling load, and internal heat spreaders (IHS’s) on the damage history observed. Based on this study, investigation of sequential loading can be pursued to identify directions and design guidelines for improving solder joint reliability of future BGA’s on flip-chip electronic packages.


1996 ◽  
Vol 118 (3) ◽  
pp. 114-121 ◽  
Author(s):  
S. M. Heinrich ◽  
M. Schaefer ◽  
S. A. Schroeder ◽  
P. S. Lee

An approximate mathematical model is developed for predicting the shapes of solder joints in an array-type interconnect (e.g., a ball-grid array or flip-chip interconnect). The model is based on the assumption that the geometry of each joint may be represented by a surface of revolution whose generating meridian is a circular arc. This leads to simple, closed-form expressions relating stand-off height, solder volume, contact pad radii, molten joint reaction force (exerted on the component), meridian curvature, and solder surface tension. The qualitative joint shapes predicted by the model include concave (hourglass-shaped), convex (barrel-shaped, with a truncated sphere as a special case), and truncated-cone geometries. Theoretical results include formulas for determining the maximum and minimum solder volumes that can be supported by a particular pair of contact pads. The model is used to create dimensionless plots which summarize the general solution in the case of a uniform array (i.e., one comprising geometrically identical joints) for which the contact pads on the component and substrate are of the same size. These results relate the values of joint height and width (after reflow) to the solder joint volume and the molten-joint force for arbitrary values of the pad radius and solder surface tension. The graphs may be applied to both upright and inverted reflow, and can be used to control stand-off for higher reliability or to reduce bridging and necking problems causing low yields. A major advantage of the model is that it is numerically efficient (involving only simple, closed-form expressions), yet generates results that are in excellent agreement with experimental data and more complex models. Thus, the model is ideally suited to performing parametric studies, the results of which may be cast in a convenient form for use by practicing engineers. Although in the present paper the array is assumed to be doubly-symmetric, i.e., possess two orthogonal planes of symmetry, the model may be extended to analyze arrays of arbitrary layout. The motivation for predicting joint geometries in array-type interconnects is two-fold: (1) to achieve optimal joint geometries from the standpoint of improved yield and better reliability under thermal cycling and (2) to take full advantage of the flexibility of new methods of dispensing solder, such as solder-jet and solder-injection technologies, which enable the volume of each individual joint to be controlled in a precise manner. Use of dispensing methods of these types permits the solder volumes in the array to be distributed in a non-uniform manner. Results such as those presented here (in combination with appropriate fatigue studies) can be used to determine the optimal arrangement of solder volumes.


Author(s):  
Hisashi Tanie ◽  
Nobuhiko Chiwata ◽  
Motoki Wakano ◽  
Masaru Fujiyoshi ◽  
Shinichi Fujiwara

A Cu-cored solder joint is a micro-joint structure in which a Cu sphere is encased in solder. It results in a more accurate height and has low thermal and electrical resistance. In a previous paper, we examined the thermal fatigue life of a Cu-cored solder ball grid array (BGA) joint through actual measurements and crack propagation analysis. As a result, we found that the thermal fatigue life of a Cu-cored solder BGA joint is about twice as long as that of a conventional joint. In this paper, we describe the impact strength of a Cu-cored solder BGA joint determined by conducting an impact bending test. This test is a technique to measure the impact strength of a micro-solder joint. This method was developed by Yaguchi et al., and they confirmed that it is an easier and more accurate method of measuring impact strength than the board level drop test. First, we simulated the impact bending test by finite element analysis (FEA) and calculated solder strains of both Cu-cored solder joints and conventional joints. The results indicated that the maximum solder strain of a Cu-cored solder joint during the impact bending test was slightly smaller than that of a conventional joint. The solder volume of the Cu-cored solder joint was also smaller than that of a conventional joint. On the other hand, joint stiffness of the Cu-cored solder joint was larger than in a conventional joint. The former increases the solder strain of the Cu-cored solder joint, and the latter decreases it. By balancing these phenomena, it is possible to obtain a maximum solder strain in the Cu-cored solder joint that is slightly smaller than in a conventional joint. Based on these phenomena, the impact strength of the Cu-cored solder joint is predicted to be the same as or higher than that of a conventional joint. Therefore, we measured the impact strengths of a Cu-cored solder joint and a conventional joint using the impact bending test. As a result, we confirmed that the impact strength of the Cu-cored solder joint was the same as or higher than that of a conventional joint. Accordingly, a Cu-cored solder BGA joint is a micro-joint structure that makes it possible to improve thermal fatigue life without decreasing impact strength. Moreover, we investigated whether the use of Cu-cored solder in a flip-chip (FC) joint improved its reliability. As a result, we found that the stress of an insulating layer on a Si die surface was reduced by using a Cu-cored solder FC joint. This is because bending deformation of the Cu land occurs, and the difference in thermal deformation between the Si chip and the Cu land becomes small. Accordingly, the Cu-cored solder FC joint is a suitable structure for improving reliability of a low-strength insulating layer.


Author(s):  
Yoav Weizman ◽  
Ezra Baruch

Abstract In recent years, two new techniques were introduced for flip chip debug; the Laser Voltage Probing (LVP) technique and Time Resolved Light Emission Microscopy (TRLEM). Both techniques utilize the silicon’s relative transparency to wavelengths longer than the band gap. This inherent wavelength limitation, together with the shrinking dimensions of modern CMOS devices, limit the capabilities of these tools. It is known that the optical resolution limits of the LVP and TRLEM techniques are bounded by the diffraction limit which is ~1um for both tools using standard optics. This limitation was reduced with the addition of immersion lens optics. Nevertheless, even with this improvement, shrinking transistor geometry is leading to increased acquisition time, and the overlapping effect between adjacent nodes remains a critical issue. The resolution limit is an order of magnitude above the device feature densities in the < 90nm era. The scaling down of transistor geometry is leading to the inevitable consequence where more than 50% of the transistors in 90nm process have widths smaller than 0.4um. The acquisition time of such nodes becomes unreasonably long. In order to examine nodes in a dense logic cuicuit, cross talk and convolution effects between neighboring signals also need to be considered. In this paper we will demonstrate the impact that these effects may have on modern design. In order to maintain the debug capability, with the currently available analytical tools for future technologies, conceptual modification of the FA process is required. This process should start on the IC design board where the VLSI designer should be familiar with FA constraints, and thus apply features that will enable enhanced FA capabilities to the circuit in hand during the electrical design or during the physical design stages. The necessity for reliable failure analysis in real-time should dictate that the designer of advanced VLSI blocks incorporates failure analysis constraints among other design rules. The purpose of this research is to supply the scientific basis for the optimal incorporation of design rules for optical probing in the < 90nm gate era. Circuit designers are usually familiar with the nodes in the design which are critical for debug, and the type of measurement (logic or DC level) they require. The designer should enable the measurement of these signals by applying certain circuit and physical constraints. The implementation of these constraints may be done at the cell level, the block level or during the integration. We will discuss the solutions, which should be considered in order to mitigate tool limitations, and also to enable their use for next generation processes.


2021 ◽  
Vol 17 (4) ◽  
pp. 1-26
Author(s):  
Md Musabbir Adnan ◽  
Sagarvarma Sayyaparaju ◽  
Samuel D. Brown ◽  
Mst Shamim Ara Shawkat ◽  
Catherine D. Schuman ◽  
...  

Spiking neural networks (SNN) offer a power efficient, biologically plausible learning paradigm by encoding information into spikes. The discovery of the memristor has accelerated the progress of spiking neuromorphic systems, as the intrinsic plasticity of the device makes it an ideal candidate to mimic a biological synapse. Despite providing a nanoscale form factor, non-volatility, and low-power operation, memristors suffer from device-level non-idealities, which impact system-level performance. To address these issues, this article presents a memristive crossbar-based neuromorphic system using unsupervised learning with twin-memristor synapses, fully digital pulse width modulated spike-timing-dependent plasticity, and homeostasis neurons. The implemented single-layer SNN was applied to a pattern-recognition task of classifying handwritten-digits. The performance of the system was analyzed by varying design parameters such as number of training epochs, neurons, and capacitors. Furthermore, the impact of memristor device non-idealities, such as device-switching mismatch, aging, failure, and process variations, were investigated and the resilience of the proposed system was demonstrated.


Machines ◽  
2021 ◽  
Vol 9 (5) ◽  
pp. 91
Author(s):  
Sunghyun Lim ◽  
Yong-hyeon Ji ◽  
Yeong-il Park

Railway vehicles are generally operated by connecting several vehicles in a row. Mechanisms connecting railway vehicles must also absorb front and rear shock loads that occur during a train’s operation. To minimize damage, rail car couplers are equipped with a buffer system that absorbs the impact of energy. It is difficult to perform a crash test and evaluate performance by applying a buffer to an actual railway vehicle. In this study, a simulation technique using a mathematical buffer model was introduced to overcome these difficulties. For this, a model of each element of the buffer was built based on the experimental data for each element of the coupling buffer system and a collision simulation program was developed. The buffering characteristics of a 10-car train colliding at 25 km/h were analyzed using a developed simulator. The results of the heavy collision simulation showed that the rubber buffer was directly connected to the hydraulic shock absorber in a solid contact state, and displacement of the hydraulic buffer hardly occurred despite the increase in reaction force due to the high impact speed. Since the impact force is concentrated on the vehicle to which the collision is applied, it may be appropriate to apply a deformation tube with different characteristics depending on the vehicle location.


2011 ◽  
Vol 462-463 ◽  
pp. 1194-1199
Author(s):  
Zainudin Kornain ◽  
Azman Jalar ◽  
Rozaidi Rashid ◽  
Shahrum Abdullah

Underfilling is the vital process to reduce the impact of the thermal stress that results from the mismatch in the co-efficient of thermal expansion (CTE) between the silicon chip and the substrate in Flip Chip Packaging. This paper reported the pattern of underfill’s hardness during curing process for large die Ceramic Flip Chip Ball Grid Array (FC-CBGA). A commercial amine based underfill epoxy was dispensed into HiCTE FC-CBGA and cured in curing oven under a new method of two-step curing profile. Nano-identation test was employed to investigate the hardness of underfill epoxy during curing steps. The result has shown the almost similar hardness of fillet area and centre of the package after cured which presented uniformity of curing states. The total curing time/cycle in production was potentially reduced due to no significant different of hardness after 60 min and 120 min during the period of second hold temperature.


2014 ◽  
Vol 54 (5) ◽  
pp. 939-944 ◽  
Author(s):  
Ye Tian ◽  
Xi Liu ◽  
Justin Chow ◽  
Yi Ping Wu ◽  
Suresh K. Sitaraman

Author(s):  
Ali Salehi ◽  
Armin Rahmatfam ◽  
Mohammad Zehsaz

The present study aimed to study ratcheting strains of corroded stainless steel 304LN elbow pipes subjected to internal pressure and cyclic bending moment. To this aim, spherical and cubical shapes corrosion are applied at two depths of 1 mm and 2 mm in the critical points of elbow pipe such as symmetry sites at intrados, extrados, and crown positions. Then, a Duplex 2205 stainless steel elbow pipe is considered as an alternative to studying the impact of the pipe materials, due to its high corrosion resistance and strength, toughness, and most importantly, the high fatigue strength and other mechanical properties than stainless steel 304LN. In order to perform numerical analyzes, the hardening coefficients of the materials were calculated. The results highlight a significant relationship between the destructive effects of corrosion and the depth and shape of corrosion, so that as corrosion increases, the resulting destructive effects increases as well, also, the ratcheting strains in cubic corrosions have a higher growth rate than spherical corrosions. In addition, the growth rate of the ratcheting strains in the hoop direction is much higher across the studied sample than the axial direction. The highest growth rate of hoop strain was observed at crown and the highest growth rate of axial strains occurred at intrados position. Altogether, Duplex 2205 material has a better performance than SS 304LN.


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