A Nested Finite Element Methodology (NFEM) for Stress Analysis of Electronic Products—Part II: Durability Analysis of Flip Chip and Chip Scale Interconnects

2000 ◽  
Vol 123 (2) ◽  
pp. 147-155 ◽  
Author(s):  
Krishna Darbha ◽  
Abhijit Dasgupta

The nested finite element methodology (NFEM) presented in Part I of this series, is used in this paper to analyze the viscoplastic stress-state in a flip-chip-on-board (FCOB) and a chip scale package subjected to temperature cycling loads. The results are validated with conventional finite element method (CFEM). An energy-partitioning (EP) damage model is used to predict cycles to failure, based on the energy densities obtained from NFEM and CFEM, and results are compared with experiments.

Author(s):  
Mark D. Nickerson ◽  
Chandrakant S. Desai

Thermomechanical, power temperature cycling (PTC) and vibration analyses were performed on a 313 staggered pin PBGA package using plastic and viscoplastic disturbed-state damage models. An accelerated finite element failure analysis was performed using a newly developed procedure. Validations were performed using published PBGA test data. The disturbed state concept was used to model the disturbance (damage) accumulated in PBGA solder joints subjected to thermal cycling (PTC and TCT), vibration, and vibration coupled with three distinct temperatures. 2D FEA plastic and viscoplastic models were created based on a diagonal “slice” of the PBGA. This allowed the most critical solder balls (under the die and furthest DNP) to be analyzed in the same model. The thermal cycling results indicate that the solder balls under the die are the most likely to fail. The vibration results indicate the solder balls furthest from the package center are most likely to fail. The vibration results, coupled with distinct isothermal temperatures, indicate that as temperature increases, the cycles to failure decreases.


2000 ◽  
Vol 122 (4) ◽  
pp. 335-340 ◽  
Author(s):  
Reza Ghaffarian

This paper reviews the accelerated thermal cycling test methods that are currently used by industry to characterize the interconnect reliability of commercial-off-the-shelf (COTS) ball grid array (BGA) and chip scale package (CSP) assemblies. Acceleration induced failure mechanisms varied from conventional surface mount (SM) failures for CSPs. Examples of unrealistic life projections for other CSPs are also presented. The cumulative cycles-to-failure for ceramic BGA assemblies performed under different conditions, including plots of their two Weibull parameters, are presented. The results are for cycles in the range of −30°C to 100°C, −55°C to 100°C, and −55°C to 125°C. Failure mechanisms, as well as cycles to failure for thermal shock and thermal cycling conditions in the range of −55°C to 125°C, were compared. Projection to other temperature cycling ranges using a modified Coffin-Manson relationship is also presented. [S1043-7398(00)00104-3]


1999 ◽  
Vol 121 (4) ◽  
pp. 231-236 ◽  
Author(s):  
K. Darbha ◽  
J. H. Okura ◽  
A. Dasgupta

A generalized multi-domain Rayleigh-Ritz (MDRR) approach developed by Ling and Dasgupta (1995), is extended in this paper, to obtain the stress field in flip chip solder interconnects, under cyclic thermal loading. Elastic, Plastic and time-dependent visco-plastic analysis is demonstrated on flip chip solder interconnects. The method has been applied to other surface-mount interconnects in the past such as J-lead (Ling and Dasgupta, 1996a) and ball-grid joints (Ling and Dasgupta, 1997). The analysis results for the J-lead and ball grid joints have confirmed that the MDRR technique is capable of providing stress-strain hysteresis with adequate accuracy, at a fraction of the modeling effort required for finite element model generation and analyses. Nonlinear viscoplastic stress analysis results for flip chip interconnects without underfill are presented in this paper. The fatigue endurance of the solder joints is assessed by combining results from this stress analysis model with an energy-partitioning damage model (Dasgupta et al., 1992). The life predicted by the analytical damage model is compared with experimental results.


2016 ◽  
Vol 2016 (1) ◽  
pp. 000123-000133
Author(s):  
Thomas F. Marinis ◽  
Joseph W. Soucy

Abstract Solder coated polymer balls have been successfully employed for attaching packages to circuit boards with minimum standoff height, while accommodating large mismatches in thermal expansion coefficients. Dramatic improvements in temperature cycling performance are often realized by using them in place of solid solder balls, with five-fold increases in mean cycles to failure reported by a number of investigators. The sales literature, provided by suppliers of solder coated solder balls, attribute this superior temperature cycling performance to the soft, compliant polymer core of the product. Our study of the mechanics of solder coated polymer balls has revealed that their stiffness is in fact comparable to that of solid solder balls. Their rigidity results from a composite construction in which a nearly incompressible polymer material is surrounded by a copper shell that is not easily deformed from its spherical shape. We have employed finite element analysis and mechanical measurements to obtain load versus deflection curves for both normal compression and shear displacements of solder coated polymer ball connections. The enhanced temperature cycling performance of solder coated polymer ball connections is also derived from their composite construction. A cross-section through one reveals that near the solder pads, the ratio of copper to polymer is quite high, and consequently so is its resistance to shear. At the mid-plane of the connection, the ratio of copper to polymer is low, which minimizes its shear resistance. Thus, when a solder coated polymer ball connection is subjected to a shear load, as in temperature cycling, most of its deformation occurs around its mid-section. By contrast, when a solid solder ball is subjected to a shear load, most of its deformation occurs near its attachment pads, where its cross-sectional area and hence its stiffness are minimal. In either type of attachment, failure occurs when sufficient plastic strain damage accumulates in the solder to initiate a fracture. By distributing its shear strain over its midsection, a solder coated polymer ball minimizes plastic strain in its solder, where as a solder ball concentrates it near its bond pads. We have used finite element analysis to compute the cumulative plastic strain in various solder coated polymer ball assemblies subjected to cyclic shear loading induced by thermal excursions. By combining these results with an Engelmaier solder fatigue model, we predicted mean number of temperature cycles to failure of the solder connections. Our results compare favorably with published experimental data from temperature cycle tests. We have employed this analysis technique to examine how fatigue life is impacted by various connection parameters such as package size, stand-off height and solder composition, as well as those specific to solder coated polymer balls, which include size and mechanical properties of the core and ratios of solder and copper thicknesses to core diameter. Our overall objective is to enable design of complex stacked assemblies of multichip modules that meet customer reliability requirements for various use environments.


2011 ◽  
Vol 264-265 ◽  
pp. 1660-1665
Author(s):  
Yong Cheng Lin ◽  
Yu Chi Xia

More and more solder joints in circuit boards and electronic products are changing to lead free solder, placing an emphasis on lead free solder joint reliability. Solder joint fatigue failure is a serious reliability concern in area array technologies. In this study, the effects of substrate materials on the solder joint thermal fatigue life were investigated by finite element model. Accelerated temperature cycling loading was imposed to evaluate the reliability of solder joints. The thermal strain/stress in solder joints of flip chip assemblies with different substrates was compared, and the fatigue life of solder joints were evaluated by Darveaux’s crack initiation and growth model. The results show the mechanisms of substrate flexibility on improving solder joint thermal fatigue.


2021 ◽  
Author(s):  
Ralf Döring ◽  
R. Dudek ◽  
S. Rzepka ◽  
L. Scheiter ◽  
E. Noack ◽  
...  

Abstract The thermomechanical reliability of the package and interconnections of assembled flip chip ball grid arrays (FC-BGA) is investigated in comparison to a reference chip scale package (CSP). Comparison is made using finite element (FE-) simulation. A combined measuring-simulation technique is applied to calibrate the finite element simulations on a reference object. Adjustment is made based on the in-plane deformation field evaluated by both simulation and optical measurement. For the latter an optical sensor for in-plane deformation and strain field analysis is used based on grey scale correlation method. A methodology is presented and to extrapolate the knowledge gained to alternative package types of different but similar design in order to evaluate their suitability for the desired application before the physical fabrication (virtual prototyping).


Author(s):  
Jordan Roberts ◽  
M. Kaysar Rahim ◽  
Safina Hussain ◽  
Jeffrey C. Suhling ◽  
Richard C. Jaeger ◽  
...  

Thermal cycling accelerated life testing is often used to qualify area array packages (e.g. Ball Grid Arrays and Flip Chip) for various applications. Finite element life predictions for thermal cycling configurations are challenging due to the complicated temperature/time dependent constitutive relations and failure criteria needed for solders and encapsulants and their interfaces, aging/evolving material behavior (e.g. solders), difficulties in modeling plating finishes, the complicated geometries of typical electronic assemblies, etc. In addition, in-situ measurements of stresses and strains in assemblies subjected to temperature cycling is difficult because of the extreme environmental conditions and the fact that the primary materials/interfaces of interest (e.g. solder joints, die device surface, wire bonds, etc.) are embedded within the assembly (not at the surface). For these reasons, we really know quite little about the evolution of the stresses, strains, and deformations occurring within sophisticated electronic packaging geometries during thermal cycling. In our research, we are using test chips containing piezoresistive stress sensors to continuously characterize the in-situ die surface stress during long-term thermal cycling of several different area array packaging technologies including plastic ball grid array (PBGA) components, ceramic ball grid array (CBGA) components, and flip chip on laminate assemblies. The utilized (111) silicon test chips are able to measure the complete three-dimensional stress state (all 6 stress components) at each sensor site being monitored by the data acquisition hardware. The die stresses are initially measured at room temperature after packaging. The assemblies are then subjected to thermal cycling over various temperature ranges including 0 to 100 °C, −40 to 125 °C, and −55 to 125 °C, for up to 3000 thermal cycles. During the thermal cycling, sensor resistances at critical locations on the die device surface (e.g. the die center and die corners) are recorded. From the resistance data, the stresses at each site can be calculated and plotted versus time. The experimental observations show significant cycle-to-cycle evolution in the stress magnitudes due to material aging effects, stress relaxation and creep phenomena, and development of interfacial damage. The observed stress variations as a function of thermal cycling duration are also being correlated with the observed delaminations at the die surface (as measured using scanning acoustic microscopy (C-SAM)) and finite element simulations that include material constitutive models that incorporate thermal aging effects.


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