Super Field Plate Technique That Can Provide Charge Balance Effect for Lateral Power Devices Without Occupying Drift Region

2020 ◽  
Vol 67 (5) ◽  
pp. 2218-2222
Author(s):  
Chunwei Zhang ◽  
Haijun Guo ◽  
Zhenxiang Chen ◽  
Wenjing Yue ◽  
Yang Li ◽  
...  
Keyword(s):  
Drift Region ◽  
Charge Balance ◽  
Power Devices ◽  
Field Plate ◽  
Plate Technique

Practical Design of 4H-SiC Superjunction Devices in the Presence of Charge Imbalance

2018 ◽  
Vol 924 ◽  
pp. 563-567
Author(s):  
Md Monzurul Alam ◽  
Dallas T. Morisette ◽  
James A. Cooper
Keyword(s):  
Drift Region ◽  
Charge Balance ◽  
Ideal Case ◽  
Charge Imbalance ◽  
Blocking Voltage ◽  
Practical Design ◽  
Proper Design ◽  
Improved Performance ◽  
The Relationship ◽  
The Ideal

In the ideal case, superjunction (SJ) drift regions theoretically exhibit a linear relationship between specific-on resistance Ron,sp and blocking voltage VBR, but this requires perfect charge balance between the alternating n and p pillars. If any degree of imbalance exists, the relationship becomes quadratic, similar to a conventional drift region, although with somewhat improved performance. In this work, we analyze superjunction drift regions in 4H-SiC under realistic degrees of charge imbalance and show that, with proper design, a reduction in specific on-resistance of 2~10x is possible as long as the imbalance remains less than ±20%.

Device Options and Design Considerations for High-Voltage (10-20 kV) SiC Power Switching Devices

2006 ◽  
Vol 527-529 ◽  
pp. 1449-1452 ◽  
Author(s):  
Yang Sui ◽  
Ginger G. Walden ◽  
Xiao Kun Wang ◽  
James A. Cooper
Keyword(s):  
High Voltage ◽  
Current Density ◽  
Drift Region ◽  
Power Devices ◽  
Power Switching ◽  
Design Considerations ◽  
Blocking Voltage ◽  
Switching Devices

We compare the on-state characteristics of five 4H-SiC power devices designed to block 20 kV. At such a high blocking voltage, the on-state current density depends heavily on the degree of conductivity modulation in the drift region, making the IGBT and thyristor attractive devices for high blocking voltages.

Enhanced-Mode InAs QWFETs with the Source Connected Field Plate Technique for Low Power Logic Applications

2017 ◽  
Author(s):  
J.N. Yao ◽  
Y.C. Lin ◽  
H.T. Hsu ◽  
T.J. Huang ◽  
M.S. Lin ◽  
...  
Keyword(s):  
Low Power ◽  
Field Plate ◽  
Plate Technique ◽  
Low Power Logic

scholarly journals Optimal drift region for diamond power devices

2016 ◽  
Vol 69 ◽  
pp. 68-73 ◽  
Author(s):  
Gauthier Chicot ◽  
David Eon ◽  
Nicolas Rouger
Keyword(s):  
Drift Region ◽  
Power Devices

Optimization of high voltage LDMOSFETs with complex multiple-resistivity drift region and field plate

2010 ◽  
Vol 50 (7) ◽  
pp. 949-953 ◽  
Author(s):  
Yang-Hua Chang ◽  
Shih-Wei Lin ◽  
Chia-Hao Chang
Keyword(s):  
High Voltage ◽  
Drift Region ◽  
Field Plate

Comparison between Schottky Diodes with Oxide Ramp Termination on Silicon Carbide and Diamond

2007 ◽  
Vol 556-557 ◽  
pp. 865-868
Author(s):  
Gheorghe Brezeanu ◽  
M. Brezeanu ◽  
F. Udrea ◽  
G. Amaratunga ◽  
C. Boianceanu ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Schottky Barrier ◽  
Schottky Diodes ◽  
Oxide Thickness ◽  
Electrical Performance ◽  
Schottky Barrier Diodes ◽  
Field Plate ◽  
Plate Technique ◽  
First Time

A classical implementation of the field plate technique is the oxide ramp termination. This paper presents for the first time a comparison between SiC and diamond Schottky barrier diodes (SBD) using this termination. The influences of the ramp angle and oxide thickness on the diodes electrical performance are investigated for both punch-through (PT) and non punch-through (nPT) structures. The efficiency of the termination is also evaluated.

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