Thulium Silicate Interfacial Layer for Scalable High-k/Metal Gate Stacks

2013 ◽  
Vol 60 (10) ◽  
pp. 3271-3276 ◽  
Author(s):  
Eugenio Dentoni Litta ◽  
Per-Erik Hellstrom ◽  
Christoph Henkel ◽  
Mikael Ostling
Keyword(s):  
Interfacial Layer ◽  
Gate Stacks ◽  
Metal Gate ◽  
High K

Interfacial layer optimization of high-k/metal gate stacks for low temperature processing

2009 ◽  
Vol 86 (7-9) ◽  
pp. 1632-1634 ◽  
Author(s):  
Barry P. Linder ◽  
Vijay Narayanan ◽  
Eduard A. Cartier
Keyword(s):  
Low Temperature ◽  
Interfacial Layer ◽  
Gate Stacks ◽  
Metal Gate ◽  
High K ◽  
Low Temperature Processing

Enhanced degradation of n-MOSFETs with high-k/metal gate stacks under channel hot-carrier/gate-induced drain leakage alternating stress

2012 ◽  
Vol 52 (9-10) ◽  
pp. 1901-1904 ◽  
Author(s):  
Dongwoo Kim ◽  
Seonhaeng Lee ◽  
Cheolgyu Kim ◽  
Chiho Lee ◽  
Jeongsoo Park ◽  
...  
Keyword(s):  
Gate Stacks ◽  
Metal Gate ◽  
Hot Carrier ◽  
High K ◽  
Enhanced Degradation

Bottom-up method for work function tuning in high-k/metal gate stacks in advanced CMOS technologies

2011 ◽  
Author(s):  
Mrunal A. Khaderbad ◽  
Rohit Pandharipande ◽  
Aradhana Gautam ◽  
Abhishek Mishra ◽  
Meenakshi Bhaisare ◽  
...  
Keyword(s):  
Work Function ◽  
Gate Stacks ◽  
Metal Gate ◽  
Bottom Up ◽  
High K ◽  
Work Function Tuning

Interplay between Dry Etch and Wet Clean in Patterning La2O3/HfO2 Containing High-k/metal Gate Stacks

2019 ◽  
Vol 25 (5) ◽  
pp. 29-36
Author(s):  
Ingrid Vos ◽  
David Hellin ◽  
Christa Vrancken ◽  
Jef Geypen ◽  
Hugo Bender ◽  
...  
Keyword(s):  
Gate Stacks ◽  
Metal Gate ◽  
High K ◽  
Dry Etch
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