Accurate Calculation of Gate Tunneling Current in Double-Gate and Single-Gate SOI MOSFETs Through Gate Dielectric Stacks

2012 ◽  
Vol 59 (10) ◽  
pp. 2589-2596 ◽  
Author(s):  
Ferney A. Chaves ◽  
David Jimenez ◽  
Francisco J. Garcia Ruiz ◽  
Andrés Godoy ◽  
Jordi Sune
2003 ◽  
Vol 50 (12) ◽  
pp. 2579-2581 ◽  
Author(s):  
Chang-Hoon Choi ◽  
Zhiping Yu ◽  
R.W. Dutton

2003 ◽  
Vol 50 (12) ◽  
pp. 2579-2581 ◽  
Author(s):  
Chang-Hoon Choi ◽  
Zhiping Yu ◽  
R.W. Dutton

2012 ◽  
Vol 68 ◽  
pp. 93-97 ◽  
Author(s):  
Ferney Chaves ◽  
David Jiménez ◽  
Jordi Suñé

1999 ◽  
Vol 567 ◽  
Author(s):  
A. Shanware ◽  
H. Z. Massoud ◽  
E. Vogel ◽  
K. Henson ◽  
J. R. Hauser ◽  
...  

ABSTRACTThe gate tunneling current in ultrathin gate dielectric NMOSFETs with positive gate bias is due to the tunneling of electrons from the conduction and valence bands of the substrate. Valence-band electrons tunnel from the substrate of NMOS devices when the valence-band edge in the substrate rises above the conduction-band edge in the substrate. This paper reports experimental trends in the contribution of valence-band electrons tunneling to the gate current of NMOSFETs with gate oxides composed of pure SiO2. The large gate tunneling current can be reduced by replacing the conventional SiO2 gate dielectric with alternative dielectrics with larger dielectric constants. This paper reports the effect of replacing SiO2 with alternative dielectrics on the contribution of valence-band electron tunneling to the gate current. Simulations are carried out for composite SiO2/Ta2O5 gate dielectric structures.


2002 ◽  
Vol 716 ◽  
Author(s):  
Parag C. Waghmare ◽  
Samadhan B. Patil ◽  
Rajiv O. Dusane ◽  
V.Ramgopal Rao

AbstractTo extend the scaling limit of thermal SiO2, in the ultra thin regime when the direct tunneling current becomes significant, members of our group embarked on a program to explore the potential of silicon nitride as an alternative gate dielectric. Silicon nitride can be deposited using several CVD methods and its properties significantly depend on the method of deposition. Although these CVD methods can give good physical properties, the electrical properties of devices made with CVD silicon nitride show very poor performance related to very poor interface, poor stability, presence of large quantity of bulk traps and high gate leakage current. We have employed the rather newly developed Hot Wire Chemical Vapor Deposition (HWCVD) technique to develop the a:SiN:H material. From the results of large number of optimization experiments we propose the atomic hydrogen of the substrate surface prior to deposition to improve the quality of gate dielectric. Our preliminary results of these efforts show a five times improvement in the fixed charges and interface state density.


2012 ◽  
Vol 46 (3) ◽  
pp. 386-390 ◽  
Author(s):  
Iman Abaspur Kazerouni ◽  
Seyed Ebrahim Hosseini

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