The Effects of Double-Epilayer Structure on Threshold Voltage of Ultralow Voltage Trench Power MOSFET Devices

2007 ◽  
Vol 54 (4) ◽  
pp. 833-839 ◽  
Author(s):  
Qi Wang ◽  
Minhua Li ◽  
Joelle Sharp ◽  
Ashok Challa
2019 ◽  
Vol 41 (8) ◽  
pp. 203-214 ◽  
Author(s):  
Aivars Lelis ◽  
Ronald Green ◽  
Daniel Habersat

2012 ◽  
Vol 268-270 ◽  
pp. 1361-1364
Author(s):  
Shen Li Chen ◽  
Wen Ming Lee

The electrostatic discharge (ESD) reliabilities in different power MOSFETs will be investigated in this paper. From the experimental results, ESD zap pulses at the gate terminal will cause electrons or holes trap in the gate oxide and loss the Si-SiO2 interface integrity, especially for the 100V nDEMOS, 200V nDEMOS, and IRF640, in which they do not have any ESD protection strategy. Electrons or holes trapped in the gate SiO2 layer will be caused the transconductance (Gm) or threshold voltage (Vth) of a MOSFET increasing or reduction, and which is resulted from electron mobility degradation. The RFW2N06RLE and RLD03N06CLE power VDMOS ICs, which with different kinds of ESD protection circuit, are less influenced by ESD pulses experimentally.


Author(s):  
Wan Nurhasana binti Wan Ayub ◽  
Nurul Fadzlin Hasbullah ◽  
Abdul Wafi Rashid

<p>This paper presents the threshold voltage shifts for both p-channel and n-channel commercial power MOSFET before and after electron irradiation. The experiment was done under the 3MeV energy of electron with dose level varies from 50KGy until 250KGy. The results were plotted and analyzed in terms of the shifted voltage characteristics. It is observed that after irradiation, both p-channel and n-channel MOSFET experiences negative threshold voltage shifts. For n-channel devices, this is due to the radiation-induced positive charges dominated in the oxide traps while for p-channel devices it is believed due to radiation-induced ionization damage.</p>


1998 ◽  
Author(s):  
Fuyu Lin ◽  
Richard De Souza ◽  
Richard Dynes ◽  
Shifeng Lu ◽  
Pat Schay ◽  
...  

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