Negative-Capacitance FinFETs: Numerical Simulation, Compact Modeling and Circuit Evaluation

2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) ◽

10.1109/sispad.2018.8551641 ◽

2018 ◽

Cited By ~ 3

Author(s):

J. P. Duarte ◽

Y.-K. Lin ◽

Y.-H. Liao ◽

A. Sachid ◽

M.-Y. Kao ◽

...

Keyword(s):

Numerical Simulation ◽

Compact Modeling ◽

Negative Capacitance

Download Full-text

Fabrication, characterization, numerical simulation and compact modeling of P3HT based organic thin film transistors

Journal of Semiconductors ◽

10.1088/1674-4926/42/7/074102 ◽

2021 ◽

Vol 42 (7) ◽

pp. 074102

Author(s):

Shubham Dadhich ◽

A. D. D. Dwivedi ◽

Arun Kumar Singh

Keyword(s):

Thin Film ◽

Numerical Simulation ◽

Thin Film Transistors ◽

Organic Thin Film Transistors ◽

Compact Modeling ◽

Organic Thin Film

Download Full-text

Numerical Simulation and Compact Modeling of Thin Film Transistors for Future Flexible Electronics

Hybrid Nanomaterials - Flexible Electronics Materials ◽

10.5772/intechopen.90301 ◽

2020 ◽

Author(s):

Arun Dev Dhar Dwivedi ◽

Sushil Kumar Jain ◽

Rajeev Dhar Dwivedi ◽

Shubham Dadhich

Keyword(s):

Thin Film ◽

Numerical Simulation ◽

Flexible Electronics ◽

Thin Film Transistors ◽

Compact Modeling

Download Full-text

Compact Modeling of Surface Potential, Drain Current and Terminal Charges in Negative Capacitance Nanosheet FET including Quasi-Ballistic Transport

IEEE Journal of the Electron Devices Society ◽

10.1109/jeds.2020.3019927 ◽

2020 ◽

Vol 8 ◽

pp. 1168-1176

Author(s):

Amol D. Gaidhane ◽

Girish Pahwa ◽

Avirup Dasgupta ◽

Amit Verma ◽

Yogesh Singh Chauhan

Keyword(s):

Surface Potential ◽

Ballistic Transport ◽

Drain Current ◽

Compact Modeling ◽

Negative Capacitance

Download Full-text

Compact Modeling of Negative Capacitance Nanosheet FET including Quasi-Ballistic Transport

2020 4th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) ◽

10.1109/edtm47692.2020.9117841 ◽

2020 ◽

Cited By ~ 1

Author(s):

A. D. Gaidhane ◽

G. Pahwa ◽

A. Dasgupta ◽

A. Verma ◽

Y. S. Chauhan

Keyword(s):

Ballistic Transport ◽

Compact Modeling ◽

Negative Capacitance

Download Full-text

Designing energy efficient and hysteresis free negative capacitance FinFET with negative DIBL and 3.5X ION using compact modeling approach

ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference ◽

10.1109/esscirc.2016.7598240 ◽

2016 ◽

Cited By ~ 4

Author(s):

Girish Pahwa ◽

Tapas Dutta ◽

Amit Agarwal ◽

Yogesh Singh Chauhan

Keyword(s):

Energy Efficient ◽

Compact Modeling ◽

Negative Capacitance ◽

Modeling Approach

Download Full-text

Compact Modeling of Drain Current, Charges, and Capacitances in Long-Channel Gate-All-Around Negative Capacitance MFIS Transistor

IEEE Transactions on Electron Devices ◽

10.1109/ted.2018.2813059 ◽

2018 ◽

Vol 65 (5) ◽

pp. 2024-2032 ◽

Cited By ~ 17

Author(s):

Amol D. Gaidhane ◽

Girish Pahwa ◽

Amit Verma ◽

Yogesh Singh Chauhan

Keyword(s):

Drain Current ◽

Compact Modeling ◽

Negative Capacitance ◽

Channel Gate ◽

Long Channel

Download Full-text

Analysis and Compact Modeling of Negative Capacitance Transistor with High ON-Current and Negative Output Differential Resistance—Part I: Model Description

IEEE Transactions on Electron Devices ◽

10.1109/ted.2016.2614432 ◽

2016 ◽

Vol 63 (12) ◽

pp. 4981-4985 ◽

Cited By ~ 36

Author(s):

Girish Pahwa ◽

Tapas Dutta ◽

Amit Agarwal ◽

Sourabh Khandelwal ◽

Sayeef Salahuddin ◽

...

Keyword(s):

Differential Resistance ◽

Compact Modeling ◽

Model Description ◽

Negative Capacitance ◽

Negative Output

Download Full-text

Compact Modeling of Drain Current in Double Gate Negative Capacitance MFIS Transistor

2018 4th IEEE International Conference on Emerging Electronics (ICEE) ◽

10.1109/icee44586.2018.8937923 ◽

2018 ◽

Cited By ~ 1

Author(s):

Amol D. Gaidhane ◽

Girish Pahwa ◽

Amit Verma ◽

Yogesh Singh Chauhan

Keyword(s):

Drain Current ◽

Compact Modeling ◽

Negative Capacitance ◽

Double Gate

Download Full-text

Analysis and Compact Modeling of Negative Capacitance Transistor with High ON-Current and Negative Output Differential Resistance—Part II: Model Validation

IEEE Transactions on Electron Devices ◽

10.1109/ted.2016.2614436 ◽

2016 ◽

Vol 63 (12) ◽

pp. 4986-4992 ◽

Cited By ~ 70

Author(s):

Girish Pahwa ◽

Tapas Dutta ◽

Amit Agarwal ◽

Sourabh Khandelwal ◽

Sayeef Salahuddin ◽

...

Keyword(s):

Model Validation ◽

Differential Resistance ◽

Compact Modeling ◽

Negative Capacitance ◽

Negative Output

Download Full-text

Recent Trends in Compact Modeling of Negative Capacitance Field-Effect Transistors

10.1201/9781003200987-9 ◽

2021 ◽

pp. 203-226

Author(s):

Shubham Tayal ◽

Shiromani Balmukund Rahi ◽

Jay Prakash Srivastava ◽

Sandip Bhattacharya

Keyword(s):

Field Effect ◽

Field Effect Transistors ◽

Compact Modeling ◽

Negative Capacitance ◽

Recent Trends

Download Full-text