Mechanism of snapback failure induced by the latch-up test in high-voltage CMOS integrated circuits

2008 IEEE International Reliability Physics Symposium ◽

10.1109/relphy.2008.4558958 ◽

2008 ◽

Author(s):

Jen-Chou Tseng ◽

Yu-Lin Chen ◽

Chung-Ti Hsu ◽

Fu-Yi Tsai ◽

Po-An Chen ◽

...

Keyword(s):

Integrated Circuits ◽

High Voltage ◽

Cmos Integrated Circuits ◽

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An SEM based system for a complete characterization of latch-up in CMOS integrated circuits

Scanning ◽

10.1002/sca.4950080105 ◽

1986 ◽

Vol 8 (1) ◽

pp. 20-33 ◽

Cited By ~ 11

Author(s):

C. Canali ◽

F. Fantini ◽

M. Giannini ◽

A. Senin ◽

M. Vanzi ◽

...

Keyword(s):

Integrated Circuits ◽

Complete Characterization ◽

Cmos Integrated Circuits ◽

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Optimization Design on Active Guard Ring to Improve Latch-Up Immunity of CMOS Integrated Circuits

IEEE Transactions on Electron Devices ◽

10.1109/ted.2019.2898317 ◽

2019 ◽

Vol 66 (4) ◽

pp. 1648-1655 ◽

Cited By ~ 1

Author(s):

Chun-Cheng Chen ◽

Ming-Dou Ker

Keyword(s):

Integrated Circuits ◽

Optimization Design ◽

Cmos Integrated Circuits ◽

Guard Ring ◽

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Modeling Latch-Up in CMOS Integrated Circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.1982.1270006 ◽

1982 ◽

Vol 1 (4) ◽

pp. 157-162 ◽

Cited By ~ 24

Author(s):

D.B. Estreich ◽

R.W. Dutton

Keyword(s):

Integrated Circuits ◽

Cmos Integrated Circuits ◽

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Latch-Up Control in CMOS Integrated Circuits

IEEE Transactions on Nuclear Science ◽

10.1109/tns.1979.4330274 ◽

1979 ◽

Vol 26 (6) ◽

pp. 5065-5068 ◽

Cited By ~ 41

Author(s):

A. Ochoa ◽

W. Dawes ◽

D. Estreich

Keyword(s):

Integrated Circuits ◽

Cmos Integrated Circuits ◽

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Imaging latch-up sites in CMOS integrated circuits using laser scanning

Microelectronics Reliability ◽

10.1016/0026-2714(87)90291-5 ◽

1987 ◽

Vol 27 (2) ◽

pp. 391

Keyword(s):

Integrated Circuits ◽

Laser Scanning ◽

Cmos Integrated Circuits ◽

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Latch-Up in CMOS Integrated Circuits

IEEE Transactions on Nuclear Science ◽

10.1109/tns.1973.4327410 ◽

1973 ◽

Vol 20 (6) ◽

pp. 293-299 ◽

Cited By ~ 79

Author(s):

B. L. Gregory ◽

B. D. Shafer

Keyword(s):

Integrated Circuits ◽

Cmos Integrated Circuits ◽

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The Dependence of Latch-Up Sensitivity on Layout Features in CMOS Integrated Circuits

IEEE Transactions on Nuclear Science ◽

10.1109/tns.1986.4334629 ◽

1986 ◽

Vol 33 (6) ◽

pp. 1493-1498 ◽

Cited By ~ 14

Author(s):

Y. Song ◽

J. S. Cable ◽

K. N. Vu ◽

A. A. Witteles

Keyword(s):

Integrated Circuits ◽

Cmos Integrated Circuits ◽

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Imaging Latch-up Sites in CMOS Integrated Circuits Using Laser Scanning

IEEE Transactions on Components Hybrids and Manufacturing Technology ◽

10.1109/tchmt.1985.1136523 ◽

1985 ◽

Vol 8 (4) ◽

pp. 556-558 ◽

Cited By ~ 2

Author(s):

M. Weichold ◽

D. Parker ◽

J.-F. Fenech

Keyword(s):

Integrated Circuits ◽

Laser Scanning ◽

Cmos Integrated Circuits ◽

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Study of latch-up immunization in bulk CMOS integrated circuits exposed to transient ionizing radiation

Science China Technological Sciences ◽

10.1007/s11431-012-4895-5 ◽

2012 ◽

Vol 55 (11) ◽

pp. 3242-3247 ◽

Cited By ~ 6

Author(s):

RuiBin Li ◽

Wei Chen ◽

DongSheng Lin ◽

ShanChao Yang ◽

XiaoYan Bai ◽

...

Keyword(s):

Ionizing Radiation ◽

Integrated Circuits ◽

Cmos Integrated Circuits ◽

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Analysis of d.c. and a.c. anomalous latch-up effects in commercial CMOS integrated circuits

Microelectronics Reliability ◽

10.1016/0026-2714(91)90207-n ◽

1991 ◽

Vol 31 (2-3) ◽

pp. 249-254

Author(s):

Enrico Zanoni ◽

Paolo Pavan ◽

Giorgio Spiazzi ◽

Bruno Bonati ◽

Claudio Canali

Keyword(s):

Integrated Circuits ◽

Cmos Integrated Circuits ◽

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