TDDB improvement in Cu metallization under bias stress

2002 ◽  
Author(s):  
J. Noguchi ◽  
N. Ohashi ◽  
J. Yasuda ◽  
T. Jimbo ◽  
H. Yamaguchi ◽  
...  
Keyword(s):  
Cu Metallization ◽  
Bias Stress

Analytical electron microscopy of grain boundaries in Al-Cu metallizations

1992 ◽  
Vol 50 (2) ◽  
pp. 1684-1685
Author(s):  
J. R. Michael ◽  
A. D. Romig ◽  
D. R. Frear
Keyword(s):  
Electron Microscopy ◽  
Integrated Circuits ◽  
Failure Mode ◽  
Current Density ◽  
Thermal History ◽  
Analytical Electron Microscopy ◽  
Cu Metallization ◽  
Analytical Electron ◽  
Interconnect Lines

Al with additions of Cu is commonly used as the conductor metallizations for integrated circuits, the Cu being added since it improves resistance to electromigration failure. As linewidths decrease to submicrometer dimensions, the current density carried by the interconnect increases dramatically and the probability of electromigration failure increases. To increase the robustness of the interconnect lines to this failure mode, an understanding of the mechanism by which Cu improves resistance to electromigration is needed. A number of theories have been proposed to account for role of Cu on electromigration behavior and many of the theories are dependent of the elemental Cu distribution in the interconnect line. However, there is an incomplete understanding of the distribution of Cu within the Al interconnect as a function of thermal history. In order to understand the role of Cu in reducing electromigration failures better, it is important to characterize the Cu distribution within the microstructure of the Al-Cu metallization.

The Correlation of Adhesion Strength with Barrier Structure in Cu Metallization

2003 ◽  
Vol 766 ◽  
Author(s):  
A. Sekiguchi ◽  
J. Koike ◽  
K. Ueoka ◽  
J. Ye ◽  
H. Okamura ◽  
...  
Keyword(s):  
Thin Films ◽  
Adhesion Strength ◽  
Nitrogen Concentration ◽  
Scratch Test ◽  
Barrier Structure ◽  
Barrier Layers ◽  
Cu Metallization ◽  
Microstructure Observation ◽  
Sputter Deposited ◽  
Sulfur Containing

AbstractAdhesion strength in sputter-deposited Cu thin films on various types of barrier layers was investigated by scratch test. The barrier layers were Ta1-xNx with varied nitrogen concentration of 0, 0.2, 0.3, and 0.5. Microstructure observation by TEM indicated that each layer consists of mixed phases of β;-Ta, bcc-TaN0.1, hexagonal-TaN, and fcc-TaN, depending on the nitrogen concentration. A sulfur- containing amorphous phase was also present discontinuously at the Cu/barrier interfaces in all samples. Scratch test showed that delamination occurred at the Cu/barrier interface and that the overall adhesion strength increased with increasing the nitrogen concentration. A good correlation was found between the measured adhesion strength and the composing phases in the barrier layer.

scholarly journals Fabrication of a Silicide Thermoelectric Module Employing Fractional Factorial Design Principles

2021 ◽  
Author(s):  
Joachim S. Graff ◽  
Raphael Schuler ◽  
Xin Song ◽  
Gustavo Castillo-Hernandez ◽  
Gunstein Skomedal ◽  
...  
Keyword(s):  
Factorial Design ◽  
Fractional Factorial Design ◽  
Waste Heat ◽  
Thermoelectric Module ◽  
Fractional Factorial ◽  
Taguchi Methods ◽  
Dimensional Parameter ◽  
Cu Metallization ◽  
Manganese Silicide ◽  
And Performance

AbstractThermoelectric modules can be used in waste heat harvesting, sensing, and cooling applications. Here, we report on the fabrication and performance of a four-leg module based on abundant silicide materials. While previously optimized Mg2Si0.3Sn0.675Bi0.025 is used as the n-type leg, we employ a fractional factorial design based on the Taguchi methods mapping out a four-dimensional parameter space among Mnx-εMoεSi1.75−δGeδ higher manganese silicide compositions for the p-type material. The module is assembled using a scalable fabrication process, using a Cu metallization layer and a Pb-based soldering paste. The maximum power output density of 53 μW cm–2 is achieved at a hot-side temperature of 250 °C and a temperature difference of 100 °C. This low thermoelectric output is related to the high contact resistance between the thermoelectric materials and the metallic contacts, underlining the importance of improved metallization schemes for thermoelectric module assembly.

Hot-Wire CVD Poly-Silicon Films for Thin Film Devices

1998 ◽  
Vol 507 ◽  
Author(s):  
J.K. Rath ◽  
F.D. Tichelaar ◽  
H. Meiling ◽  
R.E.I. Schropp
Keyword(s):  
Defect Density ◽  
Initial Growth ◽  
Oriented Growth ◽  
Compact Structure ◽  
High Hydrogen ◽  
New Approach ◽  
Intrinsic Nature ◽  
Bias Stress ◽  
Hydrogen Dilution ◽  
Long Duration

ABSTRACTSolar cell using profiled poly-Si:H by HWCVD as i-layer in the configuration SS/n-µSi:H(PECVD)/i-poly-Si:H(HWCVD)/p-µc-Si:H(PECVD)/ITO showed 3.7% efficiency. A current of 23.6 mA/cm2 was generated in only 1.5 µm thick poly-Si:H i-layer grown at ∼5Å/s. TFTs made with the poly-Si:H films (grown at ≥ 9Å/s) exhibited remarkable stability to long duration of 23 hours of gate bias stress of ∼lMV/cm. A saturation mobility of 1.5 cm2/Vs for the TFT has been achieved. Films made at low hydrogen dilution (Poly2) showed device quality (purely intrinsic nature, ambipolar diffusion length of 568 nm, only (220) oriented growth and low ESR defect density of <1017/cm3with complete absence of signal due to conduction electrons) but with an incubation phase of amorphous initial growth, whereas the films made at high hydrogen dilution (Polyl) had a polycrystalline initial growth, though with higher defect density, incorporated oxygen and randomly oriented grains. Poly2 films are compact and hydrogen bonding is at compact Si-H sites manifested as 2000 cm−1IR vibration and high temperature hydrogen evolution peak. Exchange interaction of spins and spin pairing are observed while increasing defects in such a compact structure. A new approach has been used to integrate these two regimes of growth to make profiled poly-Si:H layers. The new layers show good electronic properties as well as complete elimination of incubation phase.

Physics of Below Threshold Current Distribution in a-Si:H TFTs

1996 ◽  
Vol 424 ◽  
Author(s):  
H. C. Slade ◽  
M. S. Shur ◽  
S. C. Deane ◽  
M. Hack
Keyword(s):  
Amorphous Silicon ◽  
Threshold Current ◽  
Gate Insulator ◽  
Subthreshold Slope ◽  
Silicon Thin Film ◽  
Bias Stress ◽  
Spice Model ◽  
Active Layers ◽  
Insulator Interface ◽  
Current Activation

AbstractWe have examined the material properties and operation of bottom-gate amorphous silicon thin film transistors (TFTs) using temperature measurements of the subthreshold current. From the derivative of current activation energy with respect to gate bias, we have deduced information about the density of states for several different transistor types. We have demonstrated that, in TFTs with thin active layers and top nitride passivation, the current conduction channel moves from the gate insulator interface to the passivation insulator interface as the transistor switches off. Our 2D simulations clarify these experimental results. We have examined the effect of bias stress on the transistors and analyzed the resulting reduction in the subthreshold slope. Based on these results, we have extended our analytic amorphous silicon TFI SPICE model to include the effect of bias stress.

Structural and Electrical Characterization of Si-Implanted TiN as a Diffusion Barrier for Cu Metallization

1995 ◽  
Vol 391 ◽  
Author(s):  
W.F. Mcarthur ◽  
K.M. Ring ◽  
K.L. Kavanagh
Keyword(s):  
Leakage Current ◽  
Diffusion Barrier ◽  
Depth Profiling ◽  
Electrical Characterization ◽  
Implantation Dose ◽  
Cu Metallization ◽  
Reverse Leakage Current ◽  
Transmission Electron ◽  
Current Voltage

AbstractThe feasibility of Si-implanted TiN as a diffusion barrier between Cu and Si was investigated. Barrier effectiveness was evaluated via reverse leakage current of Cu/TixSiyNz/Si diodes as a function of post-deposition annealing temperature and time, and was found to depend heavily on the film composition and microstructure. TiN implanted with Si28, l0keV, 5xl016ions/cm2 formed an amorphous ternary TixSiyNz layer whose performance as a barrier to Cu diffusion exceeded that of unimplanted, polycrystalline TiN. Results from current-voltage, transmission electron microscopy (TEM), and Auger depth profiling measurements will be presented. The relationship between Si-implantation dose, TixSiyNz structure and reverse leakage current of Cu/TixSiyNz/Si diodes will be discussed, along with implications as to the suitability of these structures in Cu metallization.

Circuit-level reliability requirements for Cu metallization

2005 ◽  
Vol 5 (3) ◽  
pp. 522-531 ◽  
Author(s):  
S.M. Alam ◽  
C.L. Gan ◽  
F.L. Wei ◽  
C.V. Thompson ◽  
D.E. Troxel
Keyword(s):  
Cu Metallization

Bipolaron mechanism for bias-stress effects in polymer transistors

2003 ◽  
Vol 68 (8) ◽  
Author(s):  
R. A. Street ◽  
A. Salleo ◽  
M. L. Chabinyc
Keyword(s):  
Stress Effects ◽  
Bias Stress
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