Using a CSP Based Programming Model for Reconfigurable Processor Arrays

2008 International Conference on Reconfigurable Computing and FPGAs ◽

10.1109/reconfig.2008.41 ◽

2008 ◽

Cited By ~ 5

Author(s):

Zain-ul-Abdin ◽

Bertil Svensson

Keyword(s):

Programming Model ◽

Reconfigurable Processor ◽

Processor Arrays

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Fast ant colony optimization on reconfigurable processor arrays

Proceedings 15th International Parallel and Distributed Processing Symposium. IPDPS 2001 ◽

10.1109/ipdps.2001.925130 ◽

2005 ◽

Cited By ~ 2

Author(s):

D. Merkle ◽

M. Middendorf

Keyword(s):

Ant Colony Optimization ◽

Ant Colony ◽

Reconfigurable Processor ◽

Processor Arrays

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System Integration of Tightly-Coupled Reconfigurable Processor Arrays and Evaluation of Buffer Size Effects on Their Performance

2009 International Conference on Parallel Processing Workshops ◽

10.1109/icppw.2009.72 ◽

2009 ◽

Cited By ~ 1

Author(s):

Vahid Lari ◽

Frank Hannig ◽

Jürgen Teich

Keyword(s):

Size Effects ◽

System Integration ◽

Buffer Size ◽

Reconfigurable Processor ◽

Processor Arrays ◽

Tightly Coupled

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Design Methodology and Trade-Offs Analysis for Parameterized Dynamically Reconfigurable Processor Arrays

2007 International Conference on Field Programmable Logic and Applications ◽

10.1109/fpl.2007.4380771 ◽

2007 ◽

Cited By ~ 4

Author(s):

Yohei Hasegawa ◽

Satoshi Tsutsumi ◽

Vasutan Tanbunheng ◽

Takuro Nakamura ◽

Takashi Nishimura ◽

...

Keyword(s):

Design Methodology ◽

Reconfigurable Processor ◽

Dynamically Reconfigurable ◽

Processor Arrays ◽

Trade Offs

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Efficient Evaluation of Power/Area/Latency Design Trade-Offs for Coarse-Grained Reconfigurable Processor Arrays

Journal of Low Power Electronics ◽

10.1166/jolpe.2011.1114 ◽

2011 ◽

Vol 7 (1) ◽

pp. 29-40 ◽

Cited By ~ 1

Author(s):

Dmitrij Kissler ◽

Frank Hannig ◽

Jürgen Teich

Keyword(s):

Coarse Grained ◽

Reconfigurable Processor ◽

Processor Arrays ◽

Trade Offs

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Partitioned algorithms for gaussian elimination on reconfigurable processor arrays

Microprocessing and Microprogramming ◽

10.1016/0165-6074(90)90233-y ◽

1990 ◽

Vol 30 (1-5) ◽

pp. 153-158 ◽

Cited By ~ 4

Author(s):

M. Maresca ◽

G. Carravieri ◽

G. Cornara ◽

A.L. Frisiani

Keyword(s):

Gaussian Elimination ◽

Reconfigurable Processor ◽

Processor Arrays

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A Retargetable Compiler Based on Graph Representation for Dynamically Reconfigurable Processor Arrays

IEICE Transactions on Information and Systems ◽

10.1093/ietisy/e91-d.11.2655 ◽

2008 ◽

Vol E91-D (11) ◽

pp. 2655-2665 ◽

Cited By ~ 2

Author(s):

V. TUNBUNHENG ◽

H. AMANO

Keyword(s):

Graph Representation ◽

Reconfigurable Processor ◽

Dynamically Reconfigurable ◽

Processor Arrays ◽

Retargetable Compiler

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Flexible Particle Swarm Optimization Tasks for Reconfigurable Processor Arrays

19th IEEE International Parallel and Distributed Processing Symposium ◽

10.1109/ipdps.2005.227 ◽

2005 ◽

Cited By ~ 1

Author(s):

S. Janson ◽

M. Middendorf

Keyword(s):

Particle Swarm Optimization ◽

Particle Swarm ◽

Swarm Optimization ◽

Reconfigurable Processor ◽

Processor Arrays

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Reconfigurable processor arrays with two-track switches

Proceedings of the IEEE 1992 National Aerospace and Electronics Conference@m_NAECON 1992 ◽

10.1109/naecon.1992.220535 ◽

2003 ◽

Author(s):

J.S.N. Jean

Keyword(s):

Reconfigurable Processor ◽

Processor Arrays

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Power reduction techniques for Dynamically Reconfigurable Processor Arrays

2008 International Conference on Field Programmable Logic and Applications ◽

10.1109/fpl.2008.4629949 ◽

2008 ◽

Cited By ~ 15

Author(s):

T. Nishimura ◽

K. Hirai ◽

Y. Saito ◽

T. Nakamura ◽

Y. Hasegawa ◽

...

Keyword(s):

Power Reduction ◽

Reconfigurable Processor ◽

Dynamically Reconfigurable ◽

Reduction Techniques ◽

Processor Arrays

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Scalable Many-Domain Power Gating in Coarse-Grained Reconfigurable Processor Arrays

IEEE Embedded Systems Letters ◽

10.1109/les.2011.2124438 ◽

2011 ◽

Vol 3 (2) ◽

pp. 58-61 ◽

Cited By ~ 6

Author(s):

Dmitrij Kissler ◽

Daniel Gran ◽

Zoran Salcic ◽

Frank Hannig ◽

Jürgen Teich

Keyword(s):

Coarse Grained ◽

Power Gating ◽

Reconfigurable Processor ◽

Processor Arrays

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