Efficient Evaluation of Power/Area/Latency Design Trade-Offs for Coarse-Grained Reconfigurable Processor Arrays

2011 ◽  
Vol 7 (1) ◽  
pp. 29-40 ◽  
Author(s):  
Dmitrij Kissler ◽  
Frank Hannig ◽  
Jürgen Teich
Keyword(s):  
Coarse Grained ◽  
Reconfigurable Processor ◽  
Processor Arrays ◽  
Trade Offs

Scalable Many-Domain Power Gating in Coarse-Grained Reconfigurable Processor Arrays

2011 ◽  
Vol 3 (2) ◽  
pp. 58-61 ◽  
Author(s):  
Dmitrij Kissler ◽  
Daniel Gran ◽  
Zoran Salcic ◽  
Frank Hannig ◽  
Jürgen Teich
Keyword(s):  
Coarse Grained ◽  
Power Gating ◽  
Reconfigurable Processor ◽  
Processor Arrays

You Only Traverse Twice: A YOTT Placement, Routing, and Timing Approach for CGRAs

2021 ◽  
Vol 20 (5s) ◽  
pp. 1-25
Author(s):  
Michael Canesche ◽  
Westerley Carvalho ◽  
Lucas Reis ◽  
Matheus Oliveira ◽  
Salles Magalhães ◽  
...  
Keyword(s):  
Execution Time ◽  
High Performance ◽  
Coarse Grained ◽  
Optimal Placement ◽  
Greedy Heuristics ◽  
High Quality ◽  
Solution Quality ◽  
Graph Traversal ◽  
Trade Offs ◽  
Graph Properties

Coarse-grained reconfigurable architecture (CGRA) mapping involves three main steps: placement, routing, and timing. The mapping is an NP-complete problem, and a common strategy is to decouple this process into its independent steps. This work focuses on the placement step, and its aim is to propose a technique that is both reasonably fast and leads to high-performance solutions. Furthermore, a near-optimal placement simplifies the following routing and timing steps. Exact solutions cannot find placements in a reasonable execution time as input designs increase in size. Heuristic solutions include meta-heuristics, such as Simulated Annealing (SA) and fast and straightforward greedy heuristics based on graph traversal. However, as these approaches are probabilistic and have a large design space, it is not easy to provide both run-time efficiency and good solution quality. We propose a graph traversal heuristic that provides the best of both: high-quality placements similar to SA and the execution time of graph traversal approaches. Our placement introduces novel ideas based on “you only traverse twice” (YOTT) approach that performs a two-step graph traversal. The first traversal generates annotated data to guide the second step, which greedily performs the placement, node per node, aided by the annotated data and target architecture constraints. We introduce three new concepts to implement this technique: I/O and reconvergence annotation, degree matching, and look-ahead placement. Our analysis of this approach explores the placement execution time/quality trade-offs. We point out insights on how to analyze graph properties during dataflow mapping. Our results show that YOTT is 60.6 , 9.7 , and 2.3 faster than a high-quality SA, bounding box SA VPR, and multi-single traversal placements, respectively. Furthermore, YOTT reduces the average wire length and the maximal FIFO size (additional timing requirement on CGRAs) to avoid delay mismatches in fully pipelined architectures.

scholarly journals Coarse-grained tight-binding models

2021 ◽  
Author(s):  
Tianxiang Liu ◽  
Li Mao ◽  
Mats-Erik Pistol ◽  
Craig Pryor
Keyword(s):  
Quantum Well ◽  
Computing Time ◽  
Numerical Test ◽  
Tight Binding ◽  
Computation Time ◽  
Coarse Grained ◽  
Weakly Bound ◽  
Trade Offs ◽  
Full Calculation ◽  
Binding Models

Abstract Calculating the electronic structure of systems involving very different length scales presents a challenge. Empirical atomistic descriptions such as pseudopotentials or tight-binding models allow one to calculate the effects of atomic placements, but the computational burden increases rapidly with the size of the system, limiting the ability to treat weakly bound extended electronic states. Here we propose a new method to connect atomistic and quasi-continuous models, thus speeding up tight-binding calculations for large systems. We divide a structure into blocks consisting of several unit cells which we diagonalize individually. We then construct a tight-binding Hamiltonian for the full structure using a truncated basis for the blocks, ignoring states having large energy eigenvalues and retaining states with an energy close to the band edge energies. A numerical test using a GaAs/AlAs quantum well shows the computation time can be decreased to less than 5% of the full calculation with errors of less than 1%. We give data for the trade-offs between computing time and loss of accuracy. We also tested calculations of the density of states for a GaAs/AlAs quantum well and find a ten times speedup without much loss in accuracy.

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