Compact ATPG for concurrent SOC testing

Fifth International Workshop on Microprocessor Test and Verification (MTV 04) MTV-05 ◽

10.1109/mtv.2004.6 ◽

2006 ◽

Cited By ~ 1

Author(s):

A. Abdulrahman ◽

S. Tragoudas

Keyword(s):

Soc Testing

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SoC Testing Using LFSR Reseeding, and Scan-Slice- Based TAM Optimization and Test Scheduling

2007 Design, Automation & Test in Europe Conference & Exhibition ◽

10.1109/date.2007.364591 ◽

2007 ◽

Cited By ~ 6

Author(s):

Zhanglei Wang ◽

Krishnendu Chakrabarty ◽

Seongmoon Wang

Keyword(s):

Test Scheduling ◽

Soc Testing ◽

Lfsr Reseeding

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Indirect Test Architecture for SoC Testing

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2004.829796 ◽

2004 ◽

Vol 23 (7) ◽

pp. 1128-1142 ◽

Cited By ~ 23

Author(s):

M. Nahvi ◽

A. Ivanov

Keyword(s):

Indirect Test ◽

Soc Testing ◽

Test Architecture

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IEEE Std 1500 Compliant Infrastructure forModular SOC Testing

14th Asian Test Symposium (ATS'05) ◽

10.1109/ats.2005.67 ◽

2005 ◽

Cited By ~ 2

Author(s):

T. Waayers ◽

E.J. Marinissen ◽

M. Lousberg

Keyword(s):

Soc Testing

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On reducing wrapper boundary register cells in modular soc testing

International Test Conference, 2003. Proceedings. ITC 2003. ◽

10.1109/test.2003.1270889 ◽

2004 ◽

Cited By ~ 3

Author(s):

Qiang Xu ◽

N. Nicolici

Keyword(s):

Soc Testing

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Scan test strategy for asynchronous-synchronous interfaces [SoC testing]

The Eighth IEEE European Test Workshop, 2003. Proceedings. ◽

10.1109/etw.2003.1231667 ◽

2004 ◽

Author(s):

O. Petre ◽

H.G. Kerkhoff

Keyword(s):

Test Strategy ◽

Soc Testing ◽

Scan Test

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Deterministic test vector decompression in software using linear operations [SOC testing]

Proceedings. 21st VLSI Test Symposium, 2003. ◽

10.1109/vtest.2003.1197655 ◽

2003 ◽

Cited By ~ 8

Author(s):

K.J. Balakrishnan ◽

N.A. Touba

Keyword(s):

Test Vector ◽

Soc Testing

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Mixed-signal SoC testing: is mixed-signal design-for-test on its way?

Proceedings of the Ninth Asian Test Symposium ◽

10.1109/ats.2000.893595 ◽

2005 ◽

Author(s):

Chin-Long Wey ◽

A. Osseiran ◽

J.L. Huertas

Keyword(s):

Design For Test ◽

Signal Design ◽

Mixed Signal ◽

Soc Testing

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Control-aware test architecture design for modular SOC testing

The Eighth IEEE European Test Workshop, 2003. Proceedings. ◽

10.1109/etw.2003.1231669 ◽

2004 ◽

Cited By ~ 25

Author(s):

S.K. Goel ◽

E.J. Marinissen

Keyword(s):

Architecture Design ◽

Soc Testing ◽

Test Architecture

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Wireless SOC testing: Can RF testing costs be reduced?

Proceedings. International Test Conference ◽

10.1109/test.2002.1041928 ◽

2003 ◽

Cited By ~ 1

Author(s):

A. Kafton

Keyword(s):

Soc Testing ◽

Rf Testing ◽

Testing Costs

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Thermal Aware SOC Testing by Introducing Cooling Period

IETE Technical Review ◽

10.1080/02564602.2016.1152914 ◽

2016 ◽

Vol 34 (2) ◽

pp. 113-121

Author(s):

Trupa Sarkar ◽

Shrabanti Chakraborty ◽

Bikram Paul ◽

Sambhu Nath Pradhan

Keyword(s):

Cooling Period ◽

Soc Testing

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