Experimental Analysis of the Effect of Metal Thickness on the Quality Factor in Integrated Spiral Inductors for RF ICs

2004 ◽  
Vol 25 (2) ◽  
pp. 76-79 ◽  
Author(s):  
Y.-S. Choi ◽  
J.-B. Yoon
Keyword(s):  
Quality Factor ◽  
Experimental Analysis ◽  
Metal Thickness ◽  
Spiral Inductors ◽  
Rf Ics

scholarly journals Analysis of the impact of metal thickness and geometric parameters on the quality factor-Q in integrated spiral inductors by means of artificial bee colony technique

2019 ◽  
Vol 9 (4) ◽  
pp. 2918
Author(s):  
Hamid Bouyghf ◽  
Bachir Benhala ◽  
Abdelhadi Raihani
Keyword(s):  
Integrated Circuits ◽  
Quality Factor ◽  
Artificial Bee Colony ◽  
Spiral Inductor ◽  
Geometrical Parameters ◽  
Bee Colony ◽  
Metal Thickness ◽  
Spiral Inductors ◽  
Quality Factor Q ◽  
The Impact

The goal of this present paper is to design, analysis the influence of the inductor geometrical parameters and the effect of the metal thickness on the quality factor-Q in integrated square spiral inductor using an efficient application of the artificial bee colony (ABC) algorithm. The inductors were optimized at 2.4 GHz to determinate their major geometrical dimensions (sp, w, din…) and their number of turns, for uses in radio-frequency integrated circuits (RFICs). The optimization results are validated by the simulation using an electromagnetic simulator (ADS-Momentum). Using matlab software, the study on the impact of the effect of geometrical parameters and the effect of metal thickness, on the factor of quality-Q of spiral inductors, is shown. We first reported that it is possible to improve Q-factors further by increasing the metal thickness, and in the design of inductor; a compromise must be reached between the value of w, n, sp and din to achieve the desired quality factor-Q and other electrical parameters.

CMOS-compatible surface-micromachined suspended-spiral inductors for multi-GHz silicon RF ICs

2002 ◽  
Vol 23 (10) ◽  
pp. 591-593 ◽  
Author(s):  
Jun-Bo Yoon ◽  
Yun-Seok Choi ◽  
Byeong-Il Kim ◽  
Yunseong Eo ◽  
Euisik Yoon
Keyword(s):  
Spiral Inductors ◽  
Cmos Compatible ◽  
Rf Ics

scholarly journals Optimal Design of Spiral Inductors on Silicon Substrates for RF ICs

2005 ◽  
Vol 18 (3) ◽  
pp. 216-218 ◽  
Author(s):  
Yeong-Joo Moon ◽  
Moon-Ho Choi ◽  
Kee-Yeol Na ◽  
Nam-Su Kim ◽  
Yeong-Seuk Kim
Keyword(s):  
Optimal Design ◽  
Silicon Substrates ◽  
Spiral Inductors ◽  
Rf Ics

Spiral Inductors with Multi-Strip Coils Processed on Sapphire and Bulk Silicon Substrates

2004 ◽  
Vol 1 (4) ◽  
pp. 206-216
Author(s):  
Päivi H. Karjalainen ◽  
Juha Rapelo ◽  
Eero O. Ristolainen
Keyword(s):  
Quality Factor ◽  
Element Model ◽  
Silicon Substrates ◽  
Lumped Element ◽  
Strip Layout ◽  
Determining Factors ◽  
Inductor Coil ◽  
Spiral Inductors ◽  
Lumped Element Model ◽  
Line Space

Improvements in inductor properties are demonstrated using inductors fabricated by the SOS and CMOS processes. Inductor coils are constructed in the form of several separate strips and the effect of the coil layout on the inductance and quality factor is examined with respect to traditional (“un-slit”) inductors. Optimized multi-strip layout increases the inductance and the quality factor of an inductor. The coil layout has very little influence on the self-resonance frequency of the inductor. Multi-strip layout of the inductor coil increases the coil's series resistance, which in conjunction with the proximity effect causes the critical frequency to increase. The number of slits, the spacing between coils, and the width of the slits are the determining factors for improving the inductor characteristics when using a multi-strip arrangement. The layout produces an improvement especially in the case of SOS inductors. A ladder-type lumped element model for multi-strip inductors is presented. (The words “strip/slit” are equivalent to “track/space” or “line/space”)

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