FPGA implementation of digital controller for DC-DC buck converter

Author(s):  
M. Milanovic ◽  
M. Truntic ◽  
P. Slibar
2014 ◽  
Vol 14 (4) ◽  
pp. 796-805
Author(s):  
Li-Mei Xiu ◽  
Wei-Ping Zhang ◽  
Bo Li ◽  
Yuan-Sheng Liu

Author(s):  
Eric William ◽  
Jesus Linares-Flores ◽  
Enrique Guzman-Ramirez ◽  
Hebertt Sira-Ramirez

Author(s):  
Marissa Condon ◽  
Brendan Hayes

Purpose – The purpose of this paper is to investigate limit cycles in digitally Proportional, Integral and Derivative (PID) controlled buck regulators. Filtering is examined as a means of removing the limit cycles in digitally controlled buck regulators. Design/methodology/approach – The paper explains why limit cycles occur in a digitally PID controlled buck converter. It then proceeds to propose two filters for their elimination. Results indicate the effectiveness of each of the filters. Findings – The paper gives a mathematical analysis of the occurrence of limit cycles in digitally controlled PID buck regulators. It finds that notch and comb filters are effective for the purpose of eliminating limit cycles in buck regulators. Originality/value – The paper employs a model of the buck regulator inclusive of the inductor loss – this was not done to date for this type of work. The paper analyses PID control. This was not done in the manner given. The paper addresses filtering as a means of removing limit cycles. It examines the effect of changing the digital controller parameters on the requirements of the filters.


2007 ◽  
Vol 47 (1) ◽  
pp. 150-154 ◽  
Author(s):  
Miro Milanovic ◽  
Mitja Truntic ◽  
Primoz Slibar ◽  
Drago Dolinar

Author(s):  
Yuki Satake ◽  
Hiroyuki Furuya ◽  
Yohei Mochizuki ◽  
Yuji Fukaishi ◽  
Kohji Higuchi ◽  
...  

In recent years, improving of power factor and reducing harmonic distortion in electrical instruments are needed. In general, a current conduction mode boost converter is used for active PFC (Power Factor Correction). In a PFC boost converter, if a duty ratio, a load resistance and an input voltage are changed, the dynamic characteristics are varied greatly. This is the prime reason of difficulty of controlling the interleaved PFC boost converter. In this paper, a robust digital controller for suppressing the change of step response characteristics and variation of output voltage at a DC-DC buck converter load sudden change with high power factor and low harmonic is proposed. Experimental studies using a micro-processor for controller demonstrate that the proposed digital controller is effective to improve power factor and to suppress output voltage variation.


Sign in / Sign up

Export Citation Format

Share Document