Reconfigurable digital controller for a buck converter based on FPGA

Purpose – The purpose of this paper is to investigate limit cycles in digitally Proportional, Integral and Derivative (PID) controlled buck regulators. Filtering is examined as a means of removing the limit cycles in digitally controlled buck regulators. Design/methodology/approach – The paper explains why limit cycles occur in a digitally PID controlled buck converter. It then proceeds to propose two filters for their elimination. Results indicate the effectiveness of each of the filters. Findings – The paper gives a mathematical analysis of the occurrence of limit cycles in digitally controlled PID buck regulators. It finds that notch and comb filters are effective for the purpose of eliminating limit cycles in buck regulators. Originality/value – The paper employs a model of the buck regulator inclusive of the inductor loss – this was not done to date for this type of work. The paper analyses PID control. This was not done in the manner given. The paper addresses filtering as a means of removing limit cycles. It examines the effect of changing the digital controller parameters on the requirements of the filters.

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Robust Digital Control for Interleaved PFC Boost Converter Using Approximate 2DOF

ECTI Transactions on Computer and Information Technology (ECTI-CIT) ◽

10.37936/ecti-cit.201482.54401 ◽

1970 ◽

Vol 8 (2) ◽

pp. 187-194

Author(s):

Yuki Satake ◽

Hiroyuki Furuya ◽

Yohei Mochizuki ◽

Yuji Fukaishi ◽

Kohji Higuchi ◽

...

Keyword(s):

Power Factor ◽

Output Voltage ◽

Sudden Change ◽

Experimental Studies ◽

Input Voltage ◽

Boost Converter ◽

Buck Converter ◽

Digital Controller ◽

Step Response ◽

Duty Ratio

In recent years, improving of power factor and reducing harmonic distortion in electrical instruments are needed. In general, a current conduction mode boost converter is used for active PFC (Power Factor Correction). In a PFC boost converter, if a duty ratio, a load resistance and an input voltage are changed, the dynamic characteristics are varied greatly. This is the prime reason of difficulty of controlling the interleaved PFC boost converter. In this paper, a robust digital controller for suppressing the change of step response characteristics and variation of output voltage at a DC-DC buck converter load sudden change with high power factor and low harmonic is proposed. Experimental studies using a micro-processor for controller demonstrate that the proposed digital controller is effective to improve power factor and to suppress output voltage variation.

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Development of Digital Controller for DC-DC Buck Converter

International Journal of Power Electronics and Drive Systems (IJPEDS) ◽

10.11591/ijpeds.v6.i4.pp788-796 ◽

2015 ◽

Vol 6 (4) ◽

pp. 788

Author(s):

Sarun Soman ◽

Sangeetha T.S.

Keyword(s):

Low Voltage ◽

Digital Signal ◽

Buck Converter ◽

Digital Controller ◽

Steady State Response ◽

Control Loop ◽

State Response ◽

Simulink Model ◽

Digital Signal Controller ◽

Type 3

This paper presents a design & implementation of 3P3Z (3-pole 3-zero) digital controller based on DSC (Digital Signal Controller) for low voltage synchronous Buck Converter. The proposed control involves one voltage control loop. Analog Type-3 controller is designed for Buck Converter using standard frequency response techniques.Type-3 analog controller transforms to 3P3Z controller in discrete domain.Matlab/Simulink model of the Buck Converter with digital controller is developed. Simualtion results for steady state response and load transient response is tested using the model.

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Development of Digital Controller for synchronous Buck Converter

2015 International Conference on Signal Processing, Computing and Control (ISPCC) ◽

10.1109/ispcc.2015.7374993 ◽

2015 ◽

Cited By ~ 5

Author(s):

Sarun Soman ◽

Sangeetha T.S ◽

Bindu S

Keyword(s):

Buck Converter ◽

Digital Controller

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