Design and optimization of low-voltage low-power quasi-floating gate digital circuits

2005 ◽  
Author(s):  
K.A. Townsend ◽  
J.W. Haslett ◽  
K. Iniewski
Keyword(s):  
Low Power ◽  
Digital Circuits ◽  
Low Voltage ◽  
Floating Gate ◽  
Design And Optimization

Novel low-voltage ultra-low-power DVCC based on floating-gate folded cascode OTA

2011 ◽  
Vol 42 (8) ◽  
pp. 1010-1017 ◽  
Author(s):  
Fabian Khateb ◽  
Nabhan Khatib ◽  
Jaroslav Koton
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Floating Gate ◽  
Ultra Low Power ◽  
Folded Cascode

Carbon Nanotube Field Effect Transistor-Based Hybrid Full Adders Using Gate-Diffusion Input Structure

2019 ◽  
Vol 14 (11) ◽  
pp. 1512-1522 ◽  
Author(s):  
Seyedehsomayeh Hatefinasab
Keyword(s):  
Carbon Nanotube ◽  
Low Power ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Digital Circuits ◽  
Low Voltage ◽  
Field Effect Transistors ◽  
Full Adder ◽  
Input Structure ◽  
Effect Transistor

Scaling down the size of transistor in the nanoscale reduces the power supply voltage, as a result, the design of high-performance nano-circuit at low voltage has been considered. Most of digital circuits are composed of different components which determine the performance of the entire digital circuits. With the improvement of these components, the digital circuits can be optimized. One of these components is full adder for which various structures have been proposed to improve its performance, among them the two novel full adder structures are based on Gate-Diffusion Input (GDI) structure and half-classical XOR/XNOR logic (SEMI XOR/XNOR) modules. In this paper, Carbon Nanotube Field Effect Transistor (CNTFET)-based low power full adders by using SEMI XOR logic style and GDI structure are presented. Due to the incomparable thermal and mechanical properties of the CNTFET, it can be the first alternative to substitute the metal oxide field effect transistors (MOSFET). The digital circuits have the better performance based on CNTFET. Therefore, the three proposed full adders in this paper are designed based on CNTFET technology with many merits, such as low power dissipation, less energy delay product (EDP), and high speed at various supply voltages, frequencies, temperatures, load capacitors, and the number of tubes. Moreover, these proposed full adders occupy the minimum area consumption and have better performance in comparison with previous standard full adders. All simulations are done by using the Synopsys HSPICE simulator in 32 nm-CNTFET technology and layout of all full adder circuits are presented on Electric.

Towards Securing Low-Power Digital Circuits with Ultra-Low-Voltage Vdd Randomizers

2016 ◽  
pp. 233-248 ◽  
Author(s):  
Dina Kamel ◽  
Guerric de Streel ◽  
Santos Merino Del Pozo ◽  
Kashif Nawaz ◽  
François-Xavier Standaert ◽  
...  
Keyword(s):  
Low Power ◽  
Digital Circuits ◽  
Low Voltage

scholarly journals Ultra-Low-Voltage Low-Power Bulk-Driven Quasi-Floating-Gate Operational Transconductance Amplifier

2014 ◽  
Vol 2014 ◽  
pp. 1-7 ◽  
Author(s):  
Ziad Alsibai ◽  
Salma Bay Abo Dabbous
Keyword(s):  
Signal Processing ◽  
Power Consumption ◽  
Low Power ◽  
Low Voltage ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Bias Current ◽  
Floating Gate ◽  
Operational Transconductance Amplifier ◽  
Transconductance Amplifier

A new ultra-low-voltage (LV) low-power (LP) bulk-driven quasi-floating-gate (BD-QFG) operational transconductance amplifier (OTA) is presented in this paper. The proposed circuit is designed using 0.18 μm CMOS technology. A supply voltage of ±0.3 V and a quiescent bias current of 5 μA are used. The PSpice simulation result shows that the power consumption of the proposed BD-QFG OTA is 13.4 μW. Thus, the circuit is suitable for low-power applications. In order to confirm that the proposed BD-QFG OTA can be used in analog signal processing, a BD-QFG OTA-based diodeless precision rectifier is designed as an example application. This rectifier employs only two BD-QFG OTAs and consumes only 26.8 μW.

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