CMOS charge pumps using cross-coupled charge transfer switches with improved voltage pumping gain and low gate-oxide stress for low-voltage memory circuits

Author(s):  
Kyeong-Sik Min ◽  
Young-Hee Kim ◽  
Jin-Hong Ahn ◽  
Jin-Yong Chung ◽  
T. Sakurai
2008 ◽  
Vol 600-603 ◽  
pp. 901-906 ◽  
Author(s):  
Kathrin Rueschenschmidt ◽  
Michael Treu ◽  
Roland Rupp ◽  
Peter Friedrichs ◽  
Rudolf Elpelt ◽  
...  

Today a main focus in high efficiency power electronics based on silicon carbide (SiC) lies on the development of an unipolar SiC switch. This paper comments on the advantages of SiC switching devices in comparison to silicon (Si) switches, the decision for the SiC JFET against the SiC MOSFET, and will show new experimental results on SiC JFETs with focus on the production related topics like process window and parameter homogeneity which can be achieved with the presented device concept. Due to material properties unipolar SiC switches have, other than their Si high voltage counterparts, very low gate charge, good body diode performance, and reduced switching losses because of the potential of lower in- and output capacitances. The most common unipolar switch is the MOSFET. However, the big challenge in the case of a SiC MOSFET is the gate oxide. A gate oxide on SiC that provides adequate performance and reliability is missing until now. An alternative unipolar switching device is a normally-on JFET. The normally-on behavior is a benefit for current driven applications. If a normally-off behavior is necessary the JFET can be used together with a low voltage Si MOSFET in a cascode arrangement. Recently manufactured SiC JFETs show results in very good accordance to device simulation and demonstrate the possibility to fabricate a SiC JFET within a mass production. A growing market opportunity for such a SiC switch becomes visible.


Author(s):  
Ming-Dou Ker ◽  
Chung-Yu Wu ◽  
Hun-Hsien Chang ◽  
Chien-Chang Huang ◽  
Chau-Neng Wu ◽  
...  

2005 ◽  
Vol 45 (3-4) ◽  
pp. 479-485 ◽  
Author(s):  
C. Petit ◽  
A. Meinertzhagen ◽  
D. Zander ◽  
O. Simonetti ◽  
M. Fadlallah ◽  
...  

2002 ◽  
Vol 11 (04) ◽  
pp. 393-403 ◽  
Author(s):  
HONGCHIN LIN ◽  
NAI-HSIEN CHEN ◽  
JAINHAO LU

A new four-phase clock scheme for the four-phase charge pumping circuits using standard 0.5 μm CMOS technology at low supply voltages to generated high boosted voltages is proposed. Boosted clocks without high drivability are applied on the capacitors coupled to the gates of the main charge transfer transistors to compensate body effects. Thus, the high-voltage clock generation circuit can be easily achieved for clock frequency of 10 MHz. Due to the nearly ideal pumping gain per stage, the design methodology to optimize power efficiency is also presented. With the new clock scheme, it can efficiently pump to 9 V at supply voltage of 1 V using 10 stages by simulations, while pump to 4.7 V at supply voltage of 1.5 V using four stages by measurements.


Author(s):  
Krishna Reddy Komatla ◽  
Sreehari Rao Patri

This paper presents an ultra-low-power boost converter for self-powered IoT applications to self-start and power-up IoT devices from scratch without any requirement of an external start-up. The proposed converter and its clock generator operate in sub-threshold utilizing bulk-driven technique for low-power operation. The bulk-driven technique improves charge transfer switches for effective switching using auxiliary transistors. This approach enables a MOSFET to operate on supplies lower than its threshold voltage with a significant reduction in the reverse charge transfer and switching loss while increasing the voltage conversion efficiency and output voltage. To validate the performance of the proposed architecture, the post-layout simulation is carried out in standard CMOS 0.18[Formula: see text][Formula: see text]m technology. Under low-voltage supply of 0.4[Formula: see text]V, the simulated transient output voltage takes 110[Formula: see text][Formula: see text]s to reach 1.92[Formula: see text]V with 0.15[Formula: see text] output voltage ripple, while consuming the power of 772[Formula: see text]nW.


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