Study of Time-Dependent Dielectric Breakdown on Gate Oxide Capacitors at High Temperature

2007 ◽  
Author(s):  
R. Moonen ◽  
P. Vanmeerbeek ◽  
G. Lekens ◽  
W. de Ceuninck ◽  
P. Moens ◽  
...  
Keyword(s):  
High Temperature ◽  
Dielectric Breakdown ◽  
Gate Oxide ◽  
Time Dependent ◽  
Time Dependent Dielectric Breakdown

SiC MOSFET Reliability Update

2012 ◽  
Vol 717-720 ◽  
pp. 1073-1076 ◽  
Author(s):  
Mrinal K. Das ◽  
Sarah K. Haney ◽  
Jim Richmond ◽  
Anthony Olmedo ◽  
Q. Jon Zhang ◽  
...  
Keyword(s):  
High Temperature ◽  
Dielectric Breakdown ◽  
Gate Oxide ◽  
Time Dependent ◽  
Stable Operation ◽  
Gate Bias ◽  
Time Dependent Dielectric Breakdown ◽  
Mos Devices ◽  
Oxide Reliability ◽  
Made In

Significant advancement has been made in the gate oxide reliability of SiC MOS devices to enable the commercial release of Cree’s Z-FET™ product. This paper discusses the key reliability results from Time-Dependent-Dielectric-Breakdown (TDDB) and High Temperature Gate Bias (HTGB) measurements that indicate that the SiC MOSFETs can demonstrate excellent lifetime and stable operation in the field.

Study of Time Dependent Dielectric Breakdown Distribution in Ultrathin Gate Oxide

2007 ◽  
Vol 46 (No. 28) ◽  
pp. L691-L692 ◽  
Author(s):  
Takashi Miyakawa ◽  
Tsutomu Ichiki ◽  
Junichi Mitsuhashi ◽  
Kazutoshi Miyamoto ◽  
Tetsuo Tada ◽  
...  
Keyword(s):  
Dielectric Breakdown ◽  
Gate Oxide ◽  
Time Dependent ◽  
Time Dependent Dielectric Breakdown

High Temperature Reliability Investigations up to 350 °C of Gate Oxide Capacitors realized in a Silicon-on-Insulator CMOS-Technology

2013 ◽  
Vol 2013 (HITEN) ◽  
pp. 000116-000121
Author(s):  
K. Grella ◽  
S. Dreiner ◽  
H. Vogt ◽  
U. Paschen
Keyword(s):  
High Temperature ◽  
Dielectric Breakdown ◽  
Gate Oxide ◽  
Oxide Thickness ◽  
Cmos Technology ◽  
Silicon On Insulator ◽  
Cmos Process ◽  
Oxide Breakdown ◽  
Time Dependent Dielectric Breakdown ◽  
Single Poly Eeprom

Standard Bulk-CMOS-technology targets use-temperatures of not more than 175 °C. With Silicon-on-Insulator-technologies (SOI), digital and analog circuitry is possible up to 250 °C and even more, but performance and reliability are strongly affected at these high temperatures. One of the main critical factors is the gate oxide quality and its reliability. In this paper, we present a study of gate oxide capacitor time-dependent dielectric breakdown (TDDB) measurements at temperatures up to 350 °C. The experiments were carried out on gate oxide capacitor structures which were realized in the Fraunhofer 1.0 μm SOI-CMOS process. This technology is based on 200 mm wafers and features, among others, three layers of tungsten metallization with excellent reliability concerning electromigration, voltage independent capacitors, high resistance resistors, and single-poly-EEPROM cells. The gate oxide thickness is 40 nm. Using the data of the TDDB-measurements, the behavior of field and temperature acceleration parameters at temperatures up to 350 °C was evaluated. For a more detailed investigation, the current evolution in time was also studied. An analysis of the oxide breakdown conditions, in particular the field and temperature dependence of the charge to breakdown and the current just before breakdown, completes the study. The presented data provide important information about accelerated oxide reliability testing beyond 250 °C, and make it possible to quickly evaluate the reliability of high temperature CMOS-technologies at use-temperature.

Reliability and Ruggedness of Planar Silicon Carbide MOSFETs

2019 ◽  
Vol 963 ◽  
pp. 782-787
Author(s):  
Kevin Matocha ◽  
In Hwan Ji ◽  
Sauvik Chowdhury
Keyword(s):  
Silicon Carbide ◽  
Threshold Voltage ◽  
Dielectric Breakdown ◽  
Gate Oxide ◽  
Time Dependent ◽  
Gate Bias ◽  
Constant Voltage ◽  
Time Dependent Dielectric Breakdown ◽  
Planar Silicon ◽  
State Of Art

The reliability and ruggedness of Monolith/Littelfuse planar SiC MOSFETs have been evaluated using constant voltage time-dependent dielectric breakdown for gate oxide wearout predictions, showing estimated > 100 year life at VGS=+25V and T=175C. Using extended time high-temperature gate bias, we have shown < 250 mV threshold voltage shifts for > 5000 hours under VGS=+25V and negligible threshold voltage shifts for > 2500 hours under VGS=-10V, both at T=175C. Under unclamped inductive switching, these 1200V, 80 mOhm SiC MOSFETs survive 1000 mJ of avalanche energy, meeting state-of-art ruggedness for 1200V SiC MOSFETs.

950 Volt 4H-SiC MOSFETs: DC and Transient Performance and Gate Oxide Reliability

2008 ◽  
Vol 600-603 ◽  
pp. 1131-1134 ◽  
Author(s):  
Kevin Matocha ◽  
Zachary Stum ◽  
Steve Arthur ◽  
Greg Dunne ◽  
Ljubisa Stevanovic
Keyword(s):  
Electric Field ◽  
Applied Electric Field ◽  
Dielectric Breakdown ◽  
Gate Oxide ◽  
Time Dependent ◽  
Time To Failure ◽  
Time Dependent Dielectric Breakdown ◽  
Oxide Reliability ◽  
Blocking Voltage ◽  
Mean Time

SiC vertical MOSFETs were fabricated and characterized to achieve a blocking voltage of 950 Volts and a specific on-resistance of 8.4 mW-cm2. Extrapolations of time-dependent dielectric breakdown measurements versus applied electric field indicate that the gate oxide mean-time to failure is approximately 105 hours at 250°C.

Characterization of 0.5 µm BiCMOS Gate Oxide Using Time Dependent Dielectric Breakdown Test

2010 ◽  
Vol 97-101 ◽  
pp. 40-44
Author(s):  
Mohd Zahrin A. Wahab ◽  
Azman Jalar ◽  
Shahrum Abdullah ◽  
Hazian Mamat
Keyword(s):  
Dielectric Breakdown ◽  
Gate Oxide ◽  
Raw Material ◽  
Time Dependent ◽  
Process Equipment ◽  
Mos Capacitors ◽  
Time Dependent Dielectric Breakdown ◽  
Bicmos Technology ◽  
Set Up

This paper presents Time Dependent Dielectric Breakdown (TDDB) testing of gate oxide on 0.5µm BiCMOS Technology. The gate oxide quality for the technology has been investigated and furthermore to qualify the whole set up of the foundry from the process, equipment, cleanroom control and raw material used to produce high quality gate oxide and hence good quality of BiCMOS devices. TDDB test is the most widely used testing to check the quality of gate oxide and in this paper the TDDB test done on MOS capacitors fabricated using 0.5 µm BiCMOS Technology. Seven consecutive qualification lots have been tested and the data shown that TDDB measurement is capable to differentiate between accepted wafer and rejected wafer. The data also shown that TDDB test was capable to characterise 0.5 µm BiCMOS gate oxide with higher yield and comparable with reference lot from other foundry fab.

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