Partitioning of Variables for Multiple-Register-File VLIW Architectures

1994 ◽  
Author(s):  
Andrea Capitanio ◽  
Nikil Dutt ◽  
Alexandru Nicolau
Keyword(s):  
Register File ◽  
Vliw Architectures

Software and Hardware Techniques to Optimize Register File Utilization in VLIW Architectures

2004 ◽  
Vol 32 (6) ◽  
pp. 447-474 ◽  
Author(s):  
Javier Zalamea ◽  
Josep Llosa ◽  
Eduard Ayguadé ◽  
Mateo Valero
Keyword(s):  
Register File ◽  
Software And Hardware ◽  
Vliw Architectures

A hypergraph-based model for port allocation on multiple-register-file VLIW architectures

1995 ◽  
Vol 23 (6) ◽  
pp. 499-513 ◽  
Author(s):  
Andrea Capitanio ◽  
Alexandru Nicolau ◽  
Nikil Dutt
Keyword(s):  
Register File ◽  
Vliw Architectures

Instruction Scheduling Algorithm for Register File Connectivity Clustered VLIW Architecture

2009 ◽  
Vol 31 (1) ◽  
pp. 127-132
Author(s):  
Zhi-Xiong ZHOU ◽  
Hu HE ◽  
Xu YANG ◽  
Yan-Jun ZHANG ◽  
Yi-He SUN
Keyword(s):  
Scheduling Algorithm ◽  
Instruction Scheduling ◽  
Register File

Active-Cycle Based Register File Design for Reduced Ports and Energy

2009 ◽  
Vol 31 (2) ◽  
pp. 299-308 ◽  
Author(s):  
Yu-Lai ZHAO ◽  
Xian-Feng LI ◽  
Dong TONG ◽  
Han-Xin SUN ◽  
Jie CHEN ◽  
...  
Keyword(s):  
Register File ◽  
File Design
Sign in / Sign up

Export Citation Format

Share Document