Effective Hash-Based Algorithm for Reversible Logic Circuits Synthesis with Minimum Cost

2008 ◽  
Author(s):  
Zhiqiang Li ◽  
Hanwu Chen ◽  
Baowen Xu ◽  
Xiaoyu Song ◽  
Xiling Xue
Keyword(s):  
Minimum Cost ◽  
Logic Circuits ◽  
Reversible Logic

scholarly journals Fault Tolerance in Reversible Logic Circuits and Quantum Cost Optimization

2020 ◽  
Vol 39 (5) ◽  
pp. 1099-1116
Author(s):  
Kamaraj Arunachalam ◽  
Marichamy Perumalsamy ◽  
Kaviyashri K. Ponnusamy
Keyword(s):  
Fault Tolerance ◽  
Cost Optimization ◽  
Logic Circuits ◽  
Reversible Logic ◽  
Quantum Cost

Design of Quantum Cost, Garbage Output and Delay Optimized BCD to Excess-3 and 2’s Complement Code Converter

2018 ◽  
Vol 27 (12) ◽  
pp. 1850184 ◽  
Author(s):  
Heranmoy Maity ◽  
Arijit Kumar Barik ◽  
Arindam Biswas ◽  
Anup Kumar Bhattacharjee ◽  
Anita Pal
Keyword(s):  
Logic Gate ◽  
Logic Circuits ◽  
Reversible Logic ◽  
Combinational Logic ◽  
Quantum Cost ◽  
Code Converter ◽  
Garbage Output ◽  
Combinational Logic Circuits ◽  
Logic Functions

In this paper, we have proposed a new reversible logic gate (NG) and also the quantum cost (QC), garbage outputs, delay optimized reversible combinational logic circuits such as four bit 2’s complement code converter circuit, BCD to Excess-3 code converter using reversible logic gate. The proposed NG is used to design a four bit 2’s complement code converter circuit, BCD to Excess-3 code converter and realization of different logic functions such as NOT, AND, NAND, OR, NOR, XOR, NXOR. The proposed (new reversible logic) gate is represented by quantum implementation. The proposed work is verified by Xilinx-ISE simulator software and others logic circuits are also verified. The QC of proposed gate is 5. The QC of four bit 2’s complement code converter and BCD to Excess-3 code converter are 11 and 14 which are better with respect to previous reported results.

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