On efficient CPU-usage in a VLSI CAD-environment with application to circuit partitioning

ICECS 2000. 7th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.00EX445) ◽

10.1109/icecs.2000.911569 ◽

2002 ◽

Cited By ~ 1

Author(s):

S. Wichlund ◽

E.J. Aas

Keyword(s):

Circuit Partitioning ◽

Vlsi Cad ◽

Cpu Usage

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A Broad Review on Various VLSI CAD Algorithms for Circuit Partitioning Problems

International Journal of Mechanical and Production Engineering Research and Development ◽

10.24247/ijmperdfeb2018115 ◽

2018 ◽

Vol 8 (1) ◽

pp. 945-956

Author(s):

R. Manikandan et al., R. Manikandan et al., ◽

Keyword(s):

Circuit Partitioning ◽

Vlsi Cad ◽

Partitioning Problems

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Hybrid Particle Swarm Optimization Algorithm for VLSI Circuit Partitioning

Journal of Software ◽

10.3724/sp.j.1001.2011.03980 ◽

2011 ◽

Vol 22 (5) ◽

pp. 833-842 ◽

Cited By ~ 5

Author(s):

Wen-Zhong GUO ◽

Guo-Long CHEN ◽

XIONG Naixue ◽

Shao-Jun PENG

Keyword(s):

Particle Swarm Optimization ◽

Optimization Algorithm ◽

Particle Swarm Optimization Algorithm ◽

Particle Swarm ◽

Vlsi Circuit ◽

Circuit Partitioning ◽

Swarm Optimization ◽

Hybrid Particle ◽

Hybrid Particle Swarm Optimization

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Selecting Partial Scan Flip-flops For Circuit Partitioning

IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.1994.629890 ◽

2005 ◽

Cited By ~ 1

Author(s):

T. Ono

Keyword(s):

Circuit Partitioning ◽

Partial Scan

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Circuit partitioning for huge logic emulation systems

32nd Design Automation Conference ◽

10.1145/196244.196365 ◽

1994 ◽

Cited By ~ 28

Author(s):

Nan-Chi Chou ◽

Lung-Tien Liu ◽

Chung-Kuan Cheng ◽

Wei-Jin Dai ◽

Rodney Lindelof

Keyword(s):

Circuit Partitioning ◽

Logic Emulation

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A VLSI — CAD system for efficient design of CMOS/390 processors

Microprocessing and Microprogramming ◽

10.1016/0165-6074(91)90351-s ◽

1991 ◽

Vol 32 (1-5) ◽

pp. 227-234

Author(s):

A. Tietz ◽

J. Koehl

Keyword(s):

Efficient Design ◽

Vlsi Cad ◽

Cad System

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On multilevel circuit partitioning

1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287) ◽

10.1145/288548.289078 ◽

1998 ◽

Cited By ~ 5

Author(s):

Sverre Wichlund

Keyword(s):

Circuit Partitioning

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A middle-grain circuit partitioning strategy for 3-D integrated floating-point multipliers

2011 IEEE International 3D Systems Integration Conference (3DIC), 2011 IEEE International ◽

10.1109/3dic.2012.6263031 ◽

2012 ◽

Cited By ~ 5

Author(s):

Jubee Tada ◽

Ryusuke Egawa ◽

Kazushige Kawai ◽

Hiroaki Kobayashi ◽

Gensuke Goto

Keyword(s):

Floating Point ◽

Circuit Partitioning ◽

Partitioning Strategy

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Parallelized Technology Mapping to General PLBs by Adaptive Circuit Partitioning

10.1109/icfpt52863.2021.9609877 ◽

2021 ◽

Author(s):

Xiaoxi Wang ◽

Moucheng Yang ◽

Zhen Li ◽

Lingli Wang

Keyword(s):

Technology Mapping ◽

Circuit Partitioning ◽

Adaptive Circuit

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Machine Learning for VLSI CAD: A Case Study in On-Chip Power Grid Design

10.1109/isvlsi51109.2021.00075 ◽

2021 ◽

Author(s):

Sukanta Dey ◽

Sukumar Nandi ◽

Gaurav Trivedi

Keyword(s):

Machine Learning ◽

Power Grid ◽

Vlsi Cad ◽

Grid Design ◽

On Chip

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Efficient parallel algorithms for search problems: applications in VLSI CAD

[1990 Proceedings] The Third Symposium on the Frontiers of Massively Parallel Computation ◽

10.1109/fmpc.1990.89455 ◽

2002 ◽

Cited By ~ 5

Author(s):

S. Arvindam ◽

V. Kumar ◽

V.N. Rao

Keyword(s):

Parallel Algorithms ◽

Search Problems ◽

Vlsi Cad

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