Automated Debugging of Arithmetic Circuits Using Incremental Gröbner Basis Reduction

2017 IEEE International Conference on Computer Design (ICCD) ◽

10.1109/iccd.2017.37 ◽

2017 ◽

Cited By ~ 6

Author(s):

Farimah Farahmandi ◽

Prabhat Mishra

Keyword(s):

Arithmetic Circuits ◽

Automated Debugging ◽

Basis Reduction ◽

Bner Basis

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Active Learning Methods Applied in the Course “Digital Electronics” on the Topic “Arithmetic Circuits Using FPGA Design”

2019 29th Annual Conference of the European Association for Education in Electrical and Information Engineering (EAEEIE) ◽

10.1109/eaeeie46886.2019.9000421 ◽

2019 ◽

Cited By ~ 2

Author(s):

Adriana Borodzhieva ◽

Iordan Stoev ◽

Valentin Mutkov

Keyword(s):

Active Learning ◽

Arithmetic Circuits ◽

Fpga Design ◽

Learning Methods ◽

Digital Electronics

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On Using Approximate Computing to Build an Error Detection Scheme for Arithmetic Circuits

Journal of Electronic Testing ◽

10.1007/s10836-020-05858-5 ◽

2020 ◽

Vol 36 (1) ◽

pp. 33-46

Author(s):

B. Deveautour ◽

A. Virazel ◽

P. Girard ◽

V. Gherman

Keyword(s):

Error Detection ◽

Arithmetic Circuits ◽

Approximate Computing ◽

Detection Scheme

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Debt Cancellation and Tax Basis Reduction in Chapter X Reorganization

The Yale Law Journal ◽

10.2307/792965 ◽

1947 ◽

Vol 56 (5) ◽

pp. 891

Keyword(s):

Basis Reduction ◽

Debt Cancellation

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Efficient Formal Verification of Galois-Field Arithmetic Circuits Using ZDD Representation of Boolean Polynomials

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2021.3059924 ◽

2021 ◽

pp. 1-1

Author(s):

Akira Ito ◽

Rei Ueno ◽

Naofumi Homma

Keyword(s):

Formal Verification ◽

Galois Field ◽

Arithmetic Circuits

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Automated debugging: past, present, and future (ISSTA impact paper award)

Proceedings of the 30th ACM SIGSOFT International Symposium on Software Testing and Analysis ◽

10.1145/3460319.3472397 ◽

2021 ◽

Author(s):

Chris Parnin ◽

Alessandro Orso

Keyword(s):

Paper Award ◽

Automated Debugging

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Nonconventional Computer Arithmetic Circuits, Systems and Applications

IEEE Circuits and Systems Magazine ◽

10.1109/mcas.2020.3027425 ◽

2021 ◽

Vol 21 (1) ◽

pp. 6-40

Author(s):

Leonel Sousa

Keyword(s):

Computer Arithmetic ◽

Arithmetic Circuits

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Efficient binary to quaternary and vice versa converters: embedding in quaternary arithmetic circuits

The Journal of Supercomputing ◽

10.1007/s11227-021-03696-6 ◽

2021 ◽

Author(s):

Abdollah Norouzi Doshanlou ◽

Majid Haghparast ◽

Mehdi Hosseinzadeh ◽

Midia Reshadi

Keyword(s):

Arithmetic Circuits

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Error detection of arithmetic circuits using a residue checker with signed-digit number system

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dftvs.2001.966754 ◽

2002 ◽

Cited By ~ 1

Author(s):

Shugang Wei ◽

Kensuke Shimizu

Keyword(s):

Error Detection ◽

Number System ◽

Arithmetic Circuits ◽

Digit Number

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Towards the automated debugging and maintenance of logic-based requirements models

Proceedings 13th IEEE International Conference on Automated Software Engineering (Cat. No.98EX239) ◽

10.1109/ase.1998.732591 ◽

2002 ◽

Cited By ~ 1

Author(s):

T.L. McCluskey ◽

M.M. West

Keyword(s):

Automated Debugging ◽

Requirements Models

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A timing-driven synthesis of arithmetic circuits using carry-save-adders (short paper)

Proceedings of the 2000 conference on Asia South Pacific design automation - ASP-DAC '00 ◽

10.1145/368434.368656 ◽

2000 ◽

Cited By ~ 1

Author(s):

Taewhan Kim ◽

Junhyung Um

Keyword(s):

Arithmetic Circuits ◽

Short Paper ◽

Carry Save Adders

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