On the use of multiple fault detection times in a method for built-in test pattern generation for synchronous sequential circuits

Proceedings IEEE European Test Workshop ◽

10.1109/etw.2000.873792 ◽

2002 ◽

Cited By ~ 1

Author(s):

I. Pomeranz ◽

S.M. Reddy

Keyword(s):

Fault Detection ◽

Test Pattern ◽

Sequential Circuits ◽

Pattern Generation ◽

Test Pattern Generation ◽

Multiple Fault ◽

Synchronous Sequential Circuits

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GATTO: a genetic algorithm for automatic test pattern generation for large synchronous sequential circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.511578 ◽

1996 ◽

Vol 15 (8) ◽

pp. 991-1000 ◽

Cited By ~ 74

Author(s):

F. Corno ◽

P. Prinetto ◽

M. Rebaudengo ◽

M. Sonza Reorda

Keyword(s):

Genetic Algorithm ◽

Test Pattern ◽

Sequential Circuits ◽

Pattern Generation ◽

Test Pattern Generation ◽

Automatic Test Pattern Generation ◽

Automatic Test ◽

Synchronous Sequential Circuits

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A partitioning and storage based built-in test pattern generation method for synchronous sequential circuits

Proceedings 2001 IEEE International Conference on Computer Design: VLSI in Computers and Processors. ICCD 2001 ◽

10.1109/iccd.2001.955017 ◽

2002 ◽

Cited By ~ 1

Author(s):

I. Pomeranz ◽

S.M. Reddy

Keyword(s):

Test Pattern ◽

Sequential Circuits ◽

Pattern Generation ◽

Test Pattern Generation ◽

Synchronous Sequential Circuits ◽

And Storage

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Test pattern generation for path delay faults in synchronous sequential circuits using multiple fast clocks and multiple observation times

Proceedings of IEEE 24th International Symposium on Fault- Tolerant Computing ◽

10.1109/ftcs.1994.315617 ◽

2002 ◽

Cited By ~ 1

Author(s):

P. Uppaluri ◽

I. Pomeranz ◽

S.M. Reddy

Keyword(s):

Test Pattern ◽

Sequential Circuits ◽

Pattern Generation ◽

Test Pattern Generation ◽

Delay Faults ◽

Path Delay ◽

Path Delay Faults ◽

Synchronous Sequential Circuits ◽

Observation Times

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A simulation-based approach to test pattern generation for synchronous sequential circuits

Digest of Papers. 1992 IEEE VLSI Test Symposium ◽

10.1109/vtest.1992.232763 ◽

2003 ◽

Cited By ~ 11

Author(s):

P. Camurati ◽

F. Corno ◽

P. Prinetto ◽

M. Sonza Reorda

Keyword(s):

Test Pattern ◽

Sequential Circuits ◽

Pattern Generation ◽

Test Pattern Generation ◽

Simulation Based ◽

Synchronous Sequential Circuits

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Analysis of optimization algorithms in automated test pattern generation for sequential circuits

2017 IEEE International Conference on Systems, Man, and Cybernetics (SMC) ◽

10.1109/smc.2017.8122883 ◽

2017 ◽

Cited By ~ 1

Author(s):

Majed M. Alateeq ◽

Witold Pedrycz

Keyword(s):

Test Pattern ◽

Optimization Algorithms ◽

Sequential Circuits ◽

Pattern Generation ◽

Test Pattern Generation ◽

Automated Test

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A comparative analysis of bio-inspired optimization algorithms for automated test pattern generation in sequential circuits

Applied Soft Computing ◽

10.1016/j.asoc.2020.106967 ◽

2021 ◽

Vol 101 ◽

pp. 106967

Author(s):

Majed Alateeq ◽

Witold Pedrycz

Keyword(s):

Comparative Analysis ◽

Test Pattern ◽

Optimization Algorithms ◽

Sequential Circuits ◽

Pattern Generation ◽

Test Pattern Generation ◽

Automated Test

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Improved test pattern generation for sequential circuits using implicit enumeration

[Proceedings] 1992 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.1992.230326 ◽

2003 ◽

Author(s):

E. Auth ◽

J. Kastner

Keyword(s):

Test Pattern ◽

Sequential Circuits ◽

Pattern Generation ◽

Test Pattern Generation ◽

Implicit Enumeration

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Automatic test pattern generation for sequential circuits using genetic algorithms

Proceedings Eleventh International Conference on VLSI Design ◽

10.1109/icvd.1998.646616 ◽

2002 ◽

Cited By ~ 1

Author(s):

V. Rajesh ◽

A. Jain

Keyword(s):

Genetic Algorithms ◽

Test Pattern ◽

Sequential Circuits ◽

Pattern Generation ◽

Test Pattern Generation ◽

Automatic Test Pattern Generation ◽

Automatic Test

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Built-in test sequence generation for synchronous sequential circuits based on loading and expansion of input sequences using single and multiple fault detection times

IEEE Transactions on Computers ◽

10.1109/12.995451 ◽

2002 ◽

Vol 51 (4) ◽

pp. 409-419 ◽

Cited By ~ 1

Author(s):

I. Pomeranz ◽

S.M. Reddy

Keyword(s):

Fault Detection ◽

Sequential Circuits ◽

Test Sequence ◽

Multiple Fault ◽

Sequence Generation ◽

Synchronous Sequential Circuits ◽

Test Sequence Generation

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Multiple-fault diagnosis based on adaptive diagnostic test pattern generation

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2007.8361586 ◽

2007 ◽

Vol 26 (5) ◽

pp. 932-942

Author(s):

Yung-Chieh Lin ◽

Feng Lu ◽

Kwang-Ting Cheng

Keyword(s):

Fault Diagnosis ◽

Diagnostic Test ◽

Test Pattern ◽

Pattern Generation ◽

Test Pattern Generation ◽

Multiple Fault ◽

Multiple Fault Diagnosis

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