A Digitally Testable Capacitance-Insensitive Mixed-Signal Filter

Author(s):  
Erik Schuler ◽  
Marcelo Negreiros ◽  
Pascal Nouet ◽  
Luigi Carro
Keyword(s):  
Author(s):  
Tushar H Jaware

A Distributed Arithmetic mixed signal filter is proposed simple moving arithmetic operations the response can be improved for real time QRS detection. Signal preprocessing and detection algorithm involves different classification methods such as wavelet based de-noising procedure which reduces noise from ECG signal. The complete structure of proposed algorithms gives accurate detection of QRS wave with high memory efficiency and speed. Algorithm performance was evaluated against the Arrhythmia Database. The numerical results indicates that Proposed algorithm finally achieved minimum false detection rate for the standard database, is functionally reliable under the condition of poor signal quality in the measured ECG data.


2004 ◽  
Vol 39 (7) ◽  
pp. 1196-1201 ◽  
Author(s):  
M. Figueroa ◽  
S. Bridges ◽  
D. Hsu ◽  
C. Diorio

2013 ◽  
Vol 61 (3) ◽  
pp. 691-696 ◽  
Author(s):  
R. Suszynski ◽  
K. Wawryn

Abstract A rapid prototyping method for designing mixed signal systems has been presented in the paper. The method is based on implementation of the field programmable analog array (FPAA) to configure and reconfigure mixed signal systems. A serial algorithmic analog digital converter has been used as an example. Three converter architectures have been selected and implemented FPAA device. To verify and illustrate converters operation and prototyping capabilities, implemented converters have been excited by a sinusoidal signal. Analog sinusoidal excitations, digital responses and sinusoidal waveforms after reconstruction are presented.


2012 ◽  
Vol 1 (1) ◽  
pp. 1-7
Author(s):  
Vadim Geurkov ◽  
◽  
Lev Kirischian ◽  
Keyword(s):  

Author(s):  
Chunyu Zhang ◽  
Lakshmi Vedula ◽  
Shekhar Khandekar

Abstract Latch-up induced during High Temperature Operating Life (HTOL) test of a mixed signal device fabricated with 1.0 μm CMOS, double poly, double metal process caused failures due to an open in aluminum metal line. Metal lines revealed wedge voids of about 50% of the line width. Triggering of latch up mechanism during the HTOL test resulted in a several fold increase of current flowing through the ground metal line. This increase in current resulted in the growth of the wedge voids leading to failures due to open metal lines.


Author(s):  
Julien Goxe ◽  
Béatrice Vanhuffel ◽  
Marie Castignolles ◽  
Thomas Zirilli

Abstract Passive Voltage Contrast (PVC) in a Scanning Electron Microscope (SEM) or a Focused Ion Beam (FIB) is a key Failure Analysis (FA) technique to highlight a leaky gate. The introduction of Silicon On Insulator (SOI) substrate in our recent automotive analog mixed-signal technology highlighted a new challenge: the Bottom Oxide (BOX) layer, by isolating the Silicon Active Area from the bulk made PVC technique less effective in finding leaky MOSFET gates. A solution involving sample preparation performed with standard FA toolset is proposed to enhance PVC on SOI substrate.


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