Improvement of mechanical impact resistance of BGA packages with Pb-free solder bumps

Author(s):  
X.J. Zhao ◽  
J.F.J.M. Caers ◽  
J.W.C. de Vries ◽  
J. Kloosterman ◽  
E.H. Wong ◽  
...  
Author(s):  
Jie Gong ◽  
I. Charles Ume

A novel laser ultrasound and interferometer inspection system has been successfully applied to detect solder joint defects including missing, misaligned, open, and cracked solder bumps in flip chips, land grid array packages and chip capacitors. This system uses a pulsed Nd:YAG laser to induce ultrasound in the chip packages in the thermoelastic regime; it then measures the transient out-of-plane displacement response on the package surface using a laser interferometer. The quality of solder bumps is evaluated by analyzing the transient responses. In this paper, the application of this system is expanded to evaluate quality of lead-free solder bumps in ball grid array (BGA) packages; specifically BGA packages with poor wetting are used as test vehicles. Poor wetting not only decreases the mechanical strength of interconnection at the interface between the solder bumps and substrate, but also increases electrical resistance, which is a reliability issue. Causes of poor wetting vary from materials themselves to manufacturing process. Here, poor wetting of solder bumps were intentionally created by using an improper reflow profile. The transient out-of-plane displacement responses from these packages were compared with the responses from defect-free samples. Solder bumps with poor wetting were distinguished from the normal solder bumps by unusual correlation coefficient. Then, laser ultrasound inspection results are also compared with results from X-ray inspection and continuity test. Finally, the cross-section images were used to further confirm the existence of the poor wetting in samples with unusual correlation coefficient. It can be concluded that this laser-ultrasound system is capable of identifying the presence of poor wetting in BGA packages.


Author(s):  
Jie Gong ◽  
I. Charles Ume

Solder joint voids are usually formed by the entrapped gas bubbles during the reflow process, and are common in all surface mount applications. It is a controversial issue on the reliability of the solder joint, however the consensus is that voiding is acceptable at low contents, while excessive voiding affects mechanical properties, and decreases strength, ductility and fatigue life of the interconnections. X-ray is the most widely used technique to evaluate the voids, including the size and occurrence frequency. In this paper, a laser ultrasound and interferometer inspection system is used to inspect the voids in lead-free solder bumps in ball grid array (BGA) packages. This system uses a pulsed Nd:YAG laser to induce ultrasound in the chip packages in the thermoelastic regime; and laser interferometer is used to measure the transient out-of-plane displacement response of the package surface to the laser irradiation. The quality of solder bumps is evaluated by analyzing the transient responses. In this work, voids were intentionally created by adding the volatile flux during the assembly process. By controlling the volume of flux dip, three different levels of voiding were proposed: void-free, relatively low and relatively high. The presence of voids in the solder bumps was first verified using 2-D X-ray techniques. Meanwhile, the built-in image-processing software in X-ray tool measured the void fraction to quantify the level of voiding. Then the laser ultrasound inspection system was used to evaluate the voids in these samples. By comparing the vibration responses from voided samples and void-free samples, it was found that the laser ultrasound inspection system is capable to differentiate samples with relatively high voiding from void-free samples while the relatively low voiding was below the resolution of the inspection system. Lastly, a further comparison between the void-free and voided solder bumps was carried out by the destructive cross-section technique. The comparisons between these three solder bump evaluation methods will be presented in this paper.


2015 ◽  
Vol 772 ◽  
pp. 284-289 ◽  
Author(s):  
Sabuj Mallik ◽  
Jude Njoku ◽  
Gabriel Takyi

Voiding in solder joints poses a serious reliability concern for electronic products. The aim of this research was to quantify the void formation in lead-free solder joints through X-ray inspections. Experiments were designed to investigate how void formation is affected by solder bump size and shape, differences in reflow time and temperature, and differences in solder paste formulation. Four different lead-free solder paste samples were used to produce solder bumps on a number of test boards, using surface mount reflow soldering process. Using an advanced X-ray inspection system void percentages were measured for three different size and shape solder bumps. Results indicate that the voiding in solder joint is strongly influenced by solder bump size and shape, with voids found to have increased when bump size decreased. A longer soaking period during reflow stage has negatively affectedsolder voids. Voiding was also accelerated with smaller solder particles in solder paste.


2009 ◽  
Vol 131 (1) ◽  
Author(s):  
Xiaoqin Lin ◽  
Le Luo

Lead-free solder bumping and its related interconnection and reliability are becoming one of the important issues in today’s electronic packaging industry. In this paper, alloy electroplating was used as SnAg solder bumping process. Multiple reflow was preformed on as-plated solder bumps. Scanning electron microscopy and energy dispersive X-ray analysis were used to investigate the intermetallic compound and microvoids of cross-sectioned solder bump. Shear test was used to evaluate the reliabilities of the SnAg bumps. The 13×13 area-array Sn/3.0Ag solder bumps of 70 μm in height and 90 μm in diameter were fabricated with a smooth and shiny surface and with a uniform distribution of Ag. During multireflow, the scalloped Cu6Sn5 phase grows by a ripening process. Volume shrinkage was the main reason for the formation of microvoids during multireflow. The average shear strength of solder bumps on TiW/Cu under bump metallurgy (UBM) increased with reflow times. The electroplating process is suitable for mass production of well-controlled geometry and uniformity of SnAg solder bumps. Microvoids have trivial negative impacts on the solder bonds. The combination of TiW/Cu UBM and SnAg solder is reliable.


2015 ◽  
Vol 2015 (1) ◽  
pp. 000799-000805
Author(s):  
Marek Gorywoda ◽  
Rainer Dohle ◽  
Bernd Kandler ◽  
Bernd Burger

Electromigration comprises one of the processes affecting the long-term reliability of electronic devices; it has therefore been the focus of many investigations in recent years. In regards to flip chip packaging technology, the majority of published data is concerned with electromigration in solder connections to metallized organic substrates. Hardly any information is available in the literature on electromigration in lead-free solder connections on thin film ceramic substrates. This work presents results of a study of electromigration in lead-free (SAC305) flip chip solder bumps with a nominal diameter of 40 μm or 30 μm with a pitch of 100 μm on silicon chips assembled onto thin film Al2O3 ceramic substrates. The under bump metallization (UBM) comprised of a 5 μm thick electroless nickel immersion gold (ENIG) layer directly deposited on the AlCu0.5 trace. The ceramic substrates were metallized using a thin film multilayer (NiCr-Au(1.5 μm)-Ni(2 μm) structure on the top of which wettable areas were produced with high precision by depositing flash Au (60 nm) of the required diameter (40 μm or 30 μm). All electromigration tests were performed at the temperature of 125 °C. Initially, one chip assembly with 40 μm and one with 30 μm solder bumps was loaded with the current density of 8 kA/cm2 for 1,000 h. The assemblies did not fail and an investigation with SEM revealed no significant changes to the microstructure of the bumps. Thereafter seven chip assemblies with 40 μm solder bumps and five assemblies with 30 μm bumps were subjected to electromigration tests of 14 kA/cm2 or 25 kA/cm2, respectively. Six of the 40 μm-assemblies failed after 7,000 h and none of the 30 μm-assemblies failed after 2,500 h of test duration so far. Investigation of failed samples performed with SEM and EDX showed asymmetric changes of microstructure in respect to current flow. Several intermetallic phases were found to form in the solder. The predominant damage of the interconnects was found to occur at the cathode contact to chip; the Ni-P layers there showed typical columnar Kirkendall voids caused by migration of Ni from the layers into the solder. Failure of the contacts apparently occurred at the interface between Ni-P and solder. In summary, the results of the study indicate a very high stability of lead-free solder connections on ceramic substrates against electromigration. This high stability is primarily due to a better heat dissipation and thus to a relatively low temperature increase of the ceramic packages caused by resistive heating during flow of electric current. In addition, the type of the metallization used in the study seems to be more resistant to electromigration than the standard PCB metallization as it does not contain a copper layer.


Author(s):  
Keith Sweatman ◽  
Shoichi Suenaga ◽  
M. Miyaoka ◽  
Takashi Nozu ◽  
Kazuhiro Nogita ◽  
...  

Author(s):  
Stephen Gee ◽  
Nikhil Kelkar ◽  
Joanne Huang ◽  
King-Ning Tu

As the electronics industry continues to push for miniaturization, several reliability factors become vital issues. The demand for a high population of smaller and smaller solder bumps, while also increasing the current, have resulted in a significant increase in the current density. As outlined in the International Technology of Roadmap for Semiconductors (ITRS), this trend makes electromigration the limiting factor in high density packages. The heightened current density and correspondingly elevated operating temperatures are a critical issue in reliability since these factors facilitate the effects of electromigration. Therefore, as bump sizes continue to decrease, the study of electromigration reliability becomes crucial in order to understand and possibly prevent the causes of failure. A systematic study of electromigration in eutectic SnPb and Pb-free solder bumps was conducted in order to characterize the reliability of the Micro SMD package family. The testing includes both eutectic 63Sn-37Pb and 95.5Sn4.0Ag-0.5Cu solder bumps on an Al/Ni(V)/Cu under-bump-metallization. Mean-time-to-failure results are compared to Black’s Equation and cross-sections of the solder bumps are shown to analyze the mechanisms that led to failure.


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