Solder bumps layout design and reliability enhancement of wafer level packaging

2003 ◽  
Author(s):  
Chang-Ming Liu ◽  
Kuo-Ning Chiang
Keyword(s):  
Layout Design ◽  
Wafer Level ◽  
Wafer Level Packaging ◽  
Solder Bumps ◽  
Reliability Enhancement

A Packaging Solution for Pressure Sensor MEMS

2003 ◽  
Author(s):  
J. Wei ◽  
G. J. Qi ◽  
Z. F. Wang ◽  
Y. F. Jin ◽  
P. C. Lim ◽  
...  
Keyword(s):  
Pressure Sensor ◽  
Bonding Temperature ◽  
Aluminum Film ◽  
Wafer Level ◽  
Whole Process ◽  
Wafer Level Packaging ◽  
Solder Bumps ◽  
Via Holes ◽  
Free Interfaces ◽  
Koh Etching

In this paper, a wafer-level packaging solution for pressure sensor microelectromechanical system (MEMS) is reported. Sensor and glass cap wafers are anodically bonded at a bonding temperature less than 400°C. Bubble free interfaces are obtained and the bond strength is higher than 20 MPa. Sensor and bottom silicon cap wafers are bonded at a temperature of 400–450°C with the assistance of a gold intermediate layer. The bond strenght is higher than 5 MPa. The via holes, used for feedthroughs leading out the circuit, on bottom silicon cap wafer are anisotropically formed in KOH etching solution. Aluminum layer is sputtered on the bottom silicon wafer for electrical connection, re-routing circuit and the seed layer of under bump metallization (UBM). During sputtering process, the sidewalls of via holes are also sputtered with aluminum film. At the same time, the metal pads on sensor wafer are also built up to connect with metallized via holes. It is found that the cavities are vacuum sealed. Sputtered Cr/Ni/Au layers are used for UBM layers. Finally, solder bumps can printed or plated on the UBM. The whole process leads to promising performance of the devices.

Solder joints layout design and reliability enhancements of wafer level packaging using response surface methodology

2007 ◽  
Vol 47 (2-3) ◽  
pp. 196-204 ◽  
Author(s):  
Chang-Chun Lee ◽  
Chien-Chen Lee ◽  
Hsiao-Tung Ku ◽  
Shu-Ming Chang ◽  
Kuo-Ning Chiang
Keyword(s):  
Response Surface Methodology ◽  
Response Surface ◽  
Solder Joints ◽  
Layout Design ◽  
Wafer Level ◽  
Wafer Level Packaging

High density and through wafer copper interconnections and solder bumps for MEMS wafer-level packaging

2004 ◽  
Vol 10 (6-7) ◽  
pp. 517-521 ◽  
Author(s):  
C.-J. Lin ◽  
M.-T. Lin ◽  
S.-P. Wu ◽  
F.-G. Tseng
Keyword(s):  
High Density ◽  
Wafer Level ◽  
Wafer Level Packaging ◽  
Solder Bumps

MEMS Wafer-level Packaging Technology Using LTCC Wafer

2012 ◽  
Vol 132 (8) ◽  
pp. 246-253 ◽  
Author(s):  
Mamoru Mohri ◽  
Masayoshi Esashi ◽  
Shuji Tanaka
Keyword(s):  
Wafer Level ◽  
Packaging Technology ◽  
Wafer Level Packaging
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