Solder joints layout design and reliability enhancements of wafer level packaging using response surface methodology

2007 ◽  
Vol 47 (2-3) ◽  
pp. 196-204 ◽  
Author(s):  
Chang-Chun Lee ◽  
Chien-Chen Lee ◽  
Hsiao-Tung Ku ◽  
Shu-Ming Chang ◽  
Kuo-Ning Chiang
2001 ◽  
Vol 2001.14 (0) ◽  
pp. 477-478
Author(s):  
Kenji HIROHATA ◽  
Minoru MUKAI ◽  
Noriyasu KAWAMURA ◽  
Takashi KAWAKAMI ◽  
Kei MATSUOKA ◽  
...  

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