CMOS-based opto-electronic neural interface devices for optogenetics

2016 ◽  
Author(s):  
Takashi Tokuda ◽  
Satoki Noguchi ◽  
Satoru Iwasaki ◽  
Hiroaki Takehara ◽  
Toshihiko Noda ◽  
...  
Keyword(s):  
Neural Interface ◽  
Interface Devices

scholarly journals Massively parallel microwire arrays integrated with CMOS chips for neural recording

2020 ◽  
Vol 6 (12) ◽  
pp. eaay2789 ◽  
Author(s):  
Abdulmalik Obaid ◽  
Mina-Elraheb Hanna ◽  
Yu-Wei Wu ◽  
Mihaly Kollo ◽  
Romeo Racz ◽  
...  
Keyword(s):  
Large Scale ◽  
Modular Design ◽  
Three Dimensional ◽  
Field Potential ◽  
Neural Interface ◽  
Neural Communication ◽  
New Strategy ◽  
Planar Silicon ◽  
Interface Devices ◽  
Silicon Based

Multi-channel electrical recordings of neural activity in the brain is an increasingly powerful method revealing new aspects of neural communication, computation, and prosthetics. However, while planar silicon-based CMOS devices in conventional electronics scale rapidly, neural interface devices have not kept pace. Here, we present a new strategy to interface silicon-based chips with three-dimensional microwire arrays, providing the link between rapidly-developing electronics and high density neural interfaces. The system consists of a bundle of microwires mated to large-scale microelectrode arrays, such as camera chips. This system has excellent recording performance, demonstrated via single unit and local-field potential recordings in isolated retina and in the motor cortex or striatum of awake moving mice. The modular design enables a variety of microwire types and sizes to be integrated with different types of pixel arrays, connecting the rapid progress of commercial multiplexing, digitisation and data acquisition hardware together with a three-dimensional neural interface.

scholarly journals Chitosan‐Based, Biocompatible, Solution Processable Films for In Vivo Localization of Neural Interface Devices

2019 ◽  
Vol 5 (3) ◽  
pp. 1900663 ◽  
Author(s):  
Onni J. Rauhala ◽  
Soledad Dominguez ◽  
George D. Spyropoulos ◽  
Jose Javier Ferrero ◽  
Talia R. Boyers ◽  
...  
Keyword(s):  
Neural Interface ◽  
Solution Processable ◽  
Interface Devices

CMOS-based on-chip neural interface devices for optogenetics

2015 ◽  
Author(s):  
Takashi Tokuda ◽  
Hiroaki Takehara ◽  
Toshihiko Noda ◽  
Kiyotaka Sasagawa ◽  
Jun Ohta
Keyword(s):  
Neural Interface ◽  
On Chip ◽  
Interface Devices

scholarly journals Characterization of a-SiCx:H thin films as an encapsulation material for integrated silicon based neural interface devices

2007 ◽  
Vol 516 (1) ◽  
pp. 34-41 ◽  
Author(s):  
Jui-Mei Hsu ◽  
Prashant Tathireddy ◽  
Loren Rieth ◽  
A. Richard Normann ◽  
Florian Solzbacher
Keyword(s):  
Thin Films ◽  
Neural Interface ◽  
Interface Devices ◽  
Silicon Based

High-Density Feedthrough Technology for Hermetic Biomedical Micropackaging

2013 ◽  
Vol 1572 ◽  
Author(s):  
Emma C. Gill ◽  
John Antalek ◽  
Fred M. Kimock ◽  
Patrick J. Nasiatka ◽  
Ben P. McIntosh ◽  
...  
Keyword(s):  
Integrated Circuit ◽  
Flip Chip ◽  
Electrical Contacts ◽  
High Density ◽  
Neural Interface ◽  
Biomedical Devices ◽  
Saline Environment ◽  
Industry Standard ◽  
Thin Foils ◽  
Interface Devices

ABSTRACTImplantable electronic biomedical devices are used clinically to diagnose and treat an increasing number of medical conditions. Such devices typically employ hermetic packages that often incorporate electrical feedthroughs made with conventional ceramic-to-metal bonding technologies. This sealing technology is well established and provides robust hermetic seals, but is limited in both the number and spacing of electrical leads. Emerging devices for interfacing with the human nervous system, however, will require a large number of external electrical leads implemented in a miniaturized packaging configuration. Commercially available feedthrough technologies are currently incapable of providing external electrical contacts with spacings as small as 200 to 400 microns, and thus are neither compatible with integrated circuit I/O (input/output) pad spacings nor with miniature implantable packages. We report the development of a hermetic high-density feedthrough (HDF) technology that allows for conductive path densities as high as 1,000 per cm2, and that is capable of supporting neural interface devices. The fabrication process utilizes multilayer high temperature co-fired ceramic (HTCC) technology in conjunction with platinum leads. Before co-firing, green alumina substrates are interleaved with linear, parallel Pt trace arrays in either wire or thin foils to form the electrical feedthroughs. Layered stacks of spatially isolated traces are first compacted into a composite, and then fired to achieve densification. After firing, the densified multilayered composite compacts are sliced perpendicular to the Pt traces and lapped to produce multiple feedthrough arrays with a high density of leads (conductors). Both hermeticity and biocompatibility of such implantable feedthroughs are important, as both moisture and positive mobile ion contamination from the saline environment of the human body can lead to compromised performance or catastrophic failure. HDFs fabricated using this process with 100 conductors and lead-to-lead spacings as low as 400 microns have been helium leak tested repeatedly and found to exceed industry-accepted standards with helium leak rates in the range of 10–11 mbar-l/s. The spacing of the current prototype matches industry standard neural interface technology, and can be scaled to higher densities with lead-to-lead spacings as small as 200 microns. The reported HDF process has several distinct advantages over prior approaches, including the provision of a large number of conductive feedthrough leads suitable for flip-chip bonding with sub-mm lead-to-lead spacings (pitch), and the incorporation of materials (alumina and platinum) that are already used in medical implants. The implementation of such an HDF technology allows for significant package miniaturization, allowing greater flexibility in surgical placement as well as less invasive procedures for implantable electronic biomedical devices.

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