Simulation of high power step-buffer 4H silicon carbide metal semiconductor field effect transistor

2018 ◽  
Author(s):  
Xianjun Zhang ◽  
Mingjia Wang
Keyword(s):  
Silicon Carbide ◽  
High Power ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Effect Transistor

scholarly journals An Improved UU-MESFET with High Power Added Efficiency

Micromachines ◽  
2018 ◽  
Vol 9 (11) ◽  
pp. 573 ◽  
Author(s):  
Hujun Jia ◽  
Mei Hu ◽  
Shunwei Zhu
Keyword(s):  
Breakdown Voltage ◽  
Threshold Voltage ◽  
High Power ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Drain Current ◽  
Power Added Efficiency ◽  
Effect Transistor ◽  
The Relationship

An improved ultrahigh upper gate 4H-SiC metal semiconductor field effect transistor (IUU-MESFET) is proposed in this paper. The structure is obtained by modifying the ultrahigh upper gate height h of the ultrahigh upper gate 4H-SiC metal semiconductor field effect transistor (UU-MESFET) structure, and the h is 0.1 μm and 0.2 μm for the IUU-MESFET and UU-MESFET, respectively. Compared with the UU-MESFET, the IUU-MESFET structure has a greater threshold voltage and trans-conductance, and smaller breakdown voltage and saturation drain current, and when the ultrahigh upper gate height h is 0.1 μm, the relationship between these parameters is balanced, so as to solve the contradictory relationship that these parameters cannot be improved simultaneously. Therefore, the power added efficiency (PAE) of the IUU-MESFET structure is increased from 60.16% to 70.99% compared with the UU-MESFET, and advanced by 18%.

The Super-Lattice Castellated Field-Effect Transistor: A High-Power, High-Performance RF Amplifier

2019 ◽  
Vol 40 (7) ◽  
pp. 1048-1051 ◽  
Author(s):  
Josephine Chang ◽  
Shamima Afroz ◽  
Ken Nagamatsu ◽  
Kevin Frey ◽  
Sarat Saluru ◽  
...  
Keyword(s):  
High Power ◽  
Field Effect ◽  
High Performance ◽  
Field Effect Transistor ◽  
Rf Amplifier ◽  
Super Lattice ◽  
Effect Transistor

Improved Performance of Stair-Stepping Buffer-Gate 4H Silicon Carbide Metal Semiconductor Field Effect Transistor

2020 ◽  
Vol 209 (1) ◽  
pp. 11-18
Author(s):  
Xianjun Zhang ◽  
Na Li ◽  
Mingjia Wang ◽  
Qingliang Qin ◽  
Haohua Qin ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Effect Transistor ◽  
Improved Performance

Prolonged 500°C Operation of 100+ Transistor Silicon Carbide Integrated Circuits

2018 ◽  
Vol 924 ◽  
pp. 949-952 ◽  
Author(s):  
David J. Spry ◽  
Philip G. Neudeck ◽  
Dorothy Lukco ◽  
Liang Yu Chen ◽  
Michael J. Krasowski ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Integrated Circuits ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Earth Atmosphere ◽  
Surface Atmosphere ◽  
Effect Transistor ◽  
Output Characteristics ◽  
Technology Demonstrator

This report describes more than 5000 hours of successful 500 °C operation of semiconductor integrated circuits (ICs) with more than 100 transistors. Multiple packaged chips with two different 4H-SiC junction field effect transistor (JFET) technology demonstrator circuits have surpassed thousands of hours of oven-testing at 500 °C. After 100 hours of 500 °C burn-in, the circuits (except for 2 failures) exhibit less than 10% change in output characteristics for the remainder of 500 °C testing. We also describe the observation of important differences in IC materials durability when subjected to the first nine constituents of Venus-surface atmosphere at 9.4 MPa and 460 °C in comparison to what is observed for Earth-atmosphere oven testing at 500 °C.

Avalanche Ruggedness Assessment of 1.2kV 45mΩ Asymmetric Trench SiC MOSFETs

2020 ◽  
Vol 1004 ◽  
pp. 837-842
Author(s):  
Xiao Chuan Deng ◽  
Hao Zhu ◽  
Xuan Li ◽  
Xiao Jie Xu ◽  
Kun Zhou ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Metal Oxide ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Single Pulse ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Safe Operation ◽  
Effect Transistor ◽  
The Impact

In this paper, avalanche ruggedness of the commercial 1.2kV 45mΩ asymmetric silicon carbide (SiC) metal oxide semiconductor field effect transistor (MOSFET) is investigated by single-pulse unclamped inductive switching (UIS) test. The avalanche safe operation area (SOA) of the MOSFET is established. The impact of inductance and temperature on avalanche capability is exhibited, which is valuable for many application circuits. The variation in critical avalanche energy with peak avalanche current, peak avalanche current with avalanche time, and temperatures dependence of critical avalanche energy are confirmed.

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