0.35mm pitch wafer level package board level reliability: Studying effect of ball de-population with varying ball size

2015 IEEE 65th Electronic Components and Technology Conference (ECTC) ◽

10.1109/ectc.2015.7159730 ◽

2015 ◽

Cited By ~ 6

Author(s):

Beth Keser ◽

Rey Alvarado ◽

Mark Schwarz ◽

Steve Bezuk

Keyword(s):

Wafer Level ◽

Ball Size ◽

Board Level ◽

Wafer Level Package ◽

Board Level Reliability

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Package & board level reliability study of 0.35mm fine pitch wafer level package

2017 18th International Conference on Electronic Packaging Technology (ICEPT) ◽

10.1109/icept.2017.8046464 ◽

2017 ◽

Cited By ~ 1

Author(s):

Peng Sun ◽

Jun Liu ◽

Cheng Xu ◽

Liqiang Cao

Keyword(s):

Wafer Level ◽

Reliability Study ◽

Fine Pitch ◽

Board Level ◽

Wafer Level Package ◽

Board Level Reliability

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Board level reliability enhancements for wafer level package

2015 Annual Reliability and Maintainability Symposium (RAMS) ◽

10.1109/rams.2015.7105070 ◽

2015 ◽

Author(s):

John Qiao ◽

Wenwen He ◽

Kelly Yang ◽

Wei-Ting Kary Chien

Keyword(s):

Wafer Level ◽

Board Level ◽

Wafer Level Package ◽

Board Level Reliability

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Reliability investigations of large die wafer level package (part II): Impact of solder ball composition, die thickness, and polymer passivition on board level reliability

2016 6th Electronic System-Integration Technology Conference (ESTC) ◽

10.1109/estc.2016.7764492 ◽

2016 ◽

Author(s):

Chien-An Hsieh ◽

Markus Jarn ◽

Yu-Chi Pai ◽

Yi-Liang Chen ◽

Bradford J. Factor ◽

...

Keyword(s):

Solder Ball ◽

Wafer Level ◽

Board Level ◽

Wafer Level Package ◽

Board Level Reliability ◽

Die Thickness

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Studying the Effect of Stackup Structure of Large Die Size Fan-In Wafer Level Package at 0.35 mm Pitch With Varying Ball Alloy to Enhance Board Level Reliability Performance

2016 IEEE 66th Electronic Components and Technology Conference (ECTC) ◽

10.1109/ectc.2016.17 ◽

2016 ◽

Cited By ~ 2

Author(s):

Kuei Hsiao Kuo ◽

Jerry Chiang ◽

Kui Chang ◽

Jack Shu ◽

F. L. Chien ◽

...

Keyword(s):

Wafer Level ◽

Reliability Performance ◽

Board Level ◽

Wafer Level Package ◽

Board Level Reliability

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A study of wafer level package board level reliability

2013 IEEE 63rd Electronic Components and Technology Conference ◽

10.1109/ectc.2013.6575728 ◽

2013 ◽

Cited By ~ 11

Author(s):

Steven Xu ◽

Beth Keser ◽

Christine Hau-Riege ◽

Steve Bezuk ◽

You-Wen Yau

Keyword(s):

Wafer Level ◽

Board Level ◽

Wafer Level Package ◽

Board Level Reliability

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A Study of the Board Level Reliability of Large 16FF Wafer Level Package for RF Transceivers

2020 IEEE 70th Electronic Components and Technology Conference (ECTC) ◽

10.1109/ectc32862.2020.00264 ◽

2020 ◽

Author(s):

Andreas Wolter ◽

Horst Baumeister ◽

Ceren Yeni ◽

Bemd Waidhas ◽

Jan Proschwitz ◽

...

Keyword(s):

Wafer Level ◽

Rf Transceivers ◽

Board Level ◽

Wafer Level Package ◽

Board Level Reliability

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Study of the Board Level Reliability Performance of a Large 0.3 mm Pitch Wafer Level Package

2019 IEEE 69th Electronic Components and Technology Conference (ECTC) ◽

10.1109/ectc.2019.00179 ◽

2019 ◽

Cited By ~ 2

Author(s):

Bernd Waidhas ◽

Jan Proschwitz ◽

Christoph Pietryga ◽

Thomas Wagner ◽

Beth Keser

Keyword(s):

Wafer Level ◽

Reliability Performance ◽

Board Level ◽

Wafer Level Package ◽

Board Level Reliability

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The Comparative Study to Enhance Board Level Reliability Performance of Wafer Level Package At 0.25 mm Pitch Using Micro-Ball Drop and Electroplated Solder Technology

2017 IEEE 67th Electronic Components and Technology Conference (ECTC) ◽

10.1109/ectc.2017.29 ◽

2017 ◽

Author(s):

Kuei Hsiao Kuo ◽

Yi Sin Ting ◽

Chui Feng Weng ◽

Feng Lung Chien ◽

Katch Wan ◽

...

Keyword(s):

Comparative Study ◽

Wafer Level ◽

Reliability Performance ◽

The Comparative Study ◽

Board Level ◽

Wafer Level Package ◽

Board Level Reliability

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Modeling techniques for board level drop test for a wafer-level package

2008 International Conference on Electronic Packaging Technology & High Density Packaging ◽

10.1109/icept.2008.4607141 ◽

2008 ◽

Cited By ~ 23

Author(s):

Harpreet S. Dhiman ◽

Xuejun Fan ◽

Tiao Zhou

Keyword(s):

Drop Test ◽

Wafer Level ◽

Modeling Techniques ◽

Board Level ◽

Wafer Level Package

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Board Level Reliability Study of Next Generation Large Die Wafer Level Chip Scale Package Structures

2018 International Wafer Level Packaging Conference (IWLPC) ◽

10.23919/iwlpc.2018.8573297 ◽

2018 ◽

Author(s):

Timo Henttonen ◽

Paul Mescher ◽

Doug Scott ◽

Han Park ◽

YongJae Ko ◽

...

Keyword(s):

Next Generation ◽

Wafer Level ◽

Reliability Study ◽

Chip Scale Package ◽

Board Level ◽

Board Level Reliability

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