High density compliant contacting technology for integrated high power modules in automotive applications

Author(s):  
Paolo Nenzi ◽  
Rocco Crescenzi ◽  
Alexander Dolgyi ◽  
Alexy Klyshko ◽  
Vitaly Bondarenko ◽  
...  
2015 ◽  
Vol 2015 (DPC) ◽  
pp. 000906-000937 ◽  
Author(s):  
Lars Boettcher ◽  
Lars Boettcher ◽  
S. Karaszkiewicz ◽  
D. Manessis ◽  
A. Ostmann

Power electronics packaging applications has strong demands regarding reliability and cost. The fields of developments reach from low power converter modules, over single or multichip MOSFET or IGBT packages, up to high power applications, like needed e.g. for solar inverters and automotive applications. This paper will give an overview about these applications and a description of each ones demand. The spectrum of conventional power electronics packaging reaches from SMD packages for power chips to large power modules. In most of these packages the power semiconductors are connected by bond wires, resulting in large resistances and parasitic inductance. Additionally bond wires result in a high stray inductance which limits the switching frequency. The embedding of chips using Printed Circuit Board (PCB) technology offers a solution for many of the problems in power packaging. This paper will show today's available power packages and power modules, realized in industrial production as well as in European research projects. All technologies which are used are based on PCB materials and processes. Chips are mounted to Cu foils, lead frames, high power PCBs or even ceramic substrates, embedded by vacuum lamination of laminate sheets and electrically connected by laser drilling and Cu plating. A new approach for embedded power modules will be presented in detail. In this project, different application fields are covered, ranging from 50 W over 500 W to 50kW power modules for different applications like single chip packages, over power control units for pedelec (Pedal Electric Cycle), to inverter modules for automotive applications. This approach will focus on a power core base structure for the embedded semiconductor, which is then connected to a high power PCB. The connection to the embedded die is realized by direct copper connection only. The technology principle will be described in detail. Frist manufactured demonstrators will be presented. The presented new approach for the realization of a power core structure offers new possibilities for the module manufacturing, avoiding soldering or Ag sintering of the power semiconductors and the handling of thick copper substrates during the embedding process.


2011 ◽  
Vol 2011 (HITEN) ◽  
pp. 000152-000158
Author(s):  
J. Valle Mayorga ◽  
C. Gutshall ◽  
K. Phan ◽  
I. Escorcia ◽  
H. A. Mantooth ◽  
...  

SiC power semiconductors have the capability of greatly outperforming Si-based power devices. Faster switching and smaller on-state losses coupled with higher voltage blocking and temperature capabilities, make SiC a very attractive semiconductor for high performance, high power density power modules. However, the temperature capabilities and increased power density are fully utilized only when the gate driver is placed next to the SiC devices. This requires the gate driver to successfully operate under these extreme conditions with reduced or no heat sinking requirements, allowing the full realization of a high efficiency, high power density SiC power module. In addition, since SiC devices are usually connected in a half or full bridge configuration, the gate driver should provide electrical isolation between the high and low voltage sections of the driver itself. This paper presents a 225 degrees Celsius operable, Silicon-On-Insulator (SOI) high voltage isolated gate driver IC for SiC devices. The IC was designed and fabricated in a 1 μm, partially depleted, CMOS process. The presented gate driver consists of a primary and a secondary side which are electrically isolated by the use of a transformer. The gate driver IC has been tested at a switching frequency of 200 kHz at 225 degrees Celsius while exhibiting a dv/dt noise immunity of at least 45 kV/μs.


Energies ◽  
2020 ◽  
Vol 13 (8) ◽  
pp. 2022 ◽  
Author(s):  
Maryam Mesgarpour Tousi ◽  
Mona Ghassemi

Our previous studies showed that geometrical techniques including (1) metal layer offset, (2) stacked substrate design and (3) protruding substrate, either individually or combined, cannot solve high electric field issues in high voltage high-density wide bandgap (WBG) power modules. Then, for the first time, we showed that a combination of the aforementioned geometrical methods and the application of a nonlinear field-dependent conductivity (FDC) layer could address the issue. Simulations were done under a 50 Hz sinusoidal AC voltage per IEC 61287-1. However, in practice, the insulation materials of the envisaged WBG power modules will be under square wave voltage pulses with a frequency of up to a few tens of kHz and temperatures up to a few hundred degrees. The relative permittivity and electrical conductivity of aluminum nitride (AlN) ceramic, silicone gel, and nonlinear FDC materials that were assumed to be constant in our previous studies, may be frequency- and temperature-dependent, and their dependency should be considered in the model. This is the case for other papers dealing with electric field calculation within power electronics modules, where the permittivity and AC electrical conductivity of the encapsulant and ceramic substrate materials are assumed at room temperature and for a 50 or 60 Hz AC sinusoidal voltage. Thus, the big question that remains unanswered is whether or not electric field simulations are valid for high temperature and high-frequency conditions. In this paper, this technical gap is addressed where a frequency- and temperature-dependent finite element method (FEM) model of the insulation system envisaged for a 6.5 kV high-density WBG power module will be developed in COMSOL Multiphysics, where a protruding substrate combined with the application of a nonlinear FDC layer is considered to address the high field issue. By using this model, the influence of frequency and temperature on the effectiveness of the proposed electric field reduction method is studied.


2008 ◽  
Vol 44 (1) ◽  
pp. 213-222 ◽  
Author(s):  
Wei Shen ◽  
Fei Wang ◽  
Dushan Boroyevich ◽  
C. Wesley Tipton IV

Author(s):  
Ratnesh Sharma ◽  
Rocky Shih ◽  
Chandrakant Patel ◽  
John Sontag

Data centers are the computational hub of the next generation. Rise in demand for computing has driven the emergence of high density datacenters. With the advent of high density, mission-critical datacenters, demand for electrical power for compute and cooling has grown. Deployment of a large number of high powered computer systems in very dense configurations in racks within data centers will result in very high power densities at room level. Hosting business and mission-critical applications also demand a high degree of reliability and flexibility. Managing such high power levels in the data center with cost effective reliable cooling solutions is essential to feasibility of pervasive compute infrastructure. Energy consumption of data centers can also be severely increased by over-designed air handling systems and rack layouts that allow the hot and cold air streams to mix. Absence of rack level temperature monitoring has contributed to lack of knowledge of air flow patterns and thermal management issues in conventional data centers. In this paper, we present results from exploratory data analysis (EDA) of rack-level temperature data collected over a period of several months from a conventional production datacenter. Typical datacenters experience surges in power consumption due to rise and fall in compute demand. These surges can be long term, short term or periodic, leading to associated thermal management challenges. Some variations may also be machine-dependent and vary across the datacenter. Yet other thermal perturbations may be localized and momentary. Random variations due to sensor response and calibration, if not identified, may lead to erroneous conclusions and expensive faults. Among other indicators, EDA techniques also reveal relationships among sensors and deployed hardware in space and time. Identification of such patterns can provide significant insight into data center dynamics for future forecasting purposes. Knowledge of such metrics enables energy-efficient thermal management by helping to create strategies for normal operation and disaster recovery for use with techniques like dynamic smart cooling.


Sign in / Sign up

Export Citation Format

Share Document