Thermal-fatigue life prediction equation for wafer-level chip scale package (WLCSP) lead-free solder joints on lead-free printed circuit board (PCB)

2004 ◽  
Author(s):  
J.H. Lau ◽  
Dongkai Shangguan ◽  
D.C.Y. Lau ◽  
T.T.W. Kung ◽  
S.W.R. Lee
Keyword(s):  
Life Prediction ◽  
Printed Circuit Board ◽  
Prediction Equation ◽  
Circuit Board ◽  
Lead Free ◽  
Wafer Level ◽  
Printed Circuit ◽  
Thermal Fatigue Life ◽  
Chip Scale Package ◽  
Free Solder

Creep Analysis of Wafer Level Chip Scale Package (WLCSP) With 96.5Sn-3.5Ag and 100In Lead-Free Solder Joints and Microvia Build-Up Printed Circuit Board

2000 ◽  
Author(s):  
John H. Lau ◽  
Stephen H. Pan ◽  
Chris Chang
Keyword(s):  
Shear Stress ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Lead Free ◽  
Lead Free Solder ◽  
Wafer Level ◽  
Shear Creep ◽  
Printed Circuit ◽  
Chip Scale Package ◽  
Free Solder

Abstract In this study, time-temperature-dependent nonlinear analyses of lead-free solder bumped wafer level chip scale package (WLCSP) on printed circuit board (PCB) assemblies subjected to thermal cycling conditions are presented. Two different lead-free solder alloys are considered, namely, 96.5wt%Sn-3.5wt%Ag and 100wt%In. The 62wt%Sn-36wt%Pb-2wt%Ag solder alloy is also considered to establish a baseline. All of these solder alloys are assumed to obey the Garofalo-Arrhenius steady-state creep constitutive law. The shear stress and shear creep strain hysteresis loops, shear stress history, and shear creep strain history at the corner solder joint are presented for a better understanding of the thermal-mechanical behaviors of lead-free solder bumped WLCSP on PCB assemblies. Also, the effects of microvia build-up PCB on the WLCSP solder joint reliability are investigated.

Creep Analysis of Wafer Level Chip Scale Package (WLCSP) With 96.5Sn-3.5Ag and 100In Lead-Free Solder Joints and Microvia Build-Up Printed Circuit Board

2002 ◽  
Vol 124 (2) ◽  
pp. 69-76 ◽  
Author(s):  
John H. Lau ◽  
Stephen H. Pan ◽  
Chris Chang
Keyword(s):  
Shear Stress ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Lead Free ◽  
Lead Free Solder ◽  
Wafer Level ◽  
Shear Creep ◽  
Printed Circuit ◽  
Chip Scale Package ◽  
Free Solder

In this study, time-temperature-dependent nonlinear analyses of lead-free solder bumped wafer level chip scale package (WLCSP) on printed circuit board (PCB) assemblies subjected to thermal cycling conditions are presented. Two different lead-free solder alloys are considered, namely, 96.5wt percent Sn-3.5wt percent Ag and 100wt percent In. The 62wt percent Sn-36wt percent Pb-2wt percent Ag solder alloy is also considered to establish a baseline. All of these solder alloys are assumed to obey the Garofalo-Arrhenius steady-state creep constitutive law. The shear stress and shear creep strain hysteresis loops, shear stress history, and shear creep strain history at the corner solder joint are presented for a better understanding of the thermal-mechanical behaviors of lead-free solder bumped WLCSP on PCB assemblies. Also, the effects of microvia build-up PCB on the WLCSP Solder joint reliability are investigated.

Site Redressing Techniques and Rework of Lead-Free Chip Scale Packages

2003 ◽  
Author(s):  
Arun Gowda ◽  
Anthony Primavera ◽  
K. Srihari
Keyword(s):  
Printed Circuit Board ◽  
Circuit Board ◽  
Lead Free ◽  
Lead Free Solder ◽  
Solder Paste ◽  
Printed Circuit ◽  
Free Solder ◽  
The Individual ◽  
Component Assembly ◽  
Free Area

The implementation of lead-free solder into an electronics assembly process necessitates the reassessment of the individual factors involved in component attachment and rework. A component assembly undergoes multiple thermal cycles during rework. With the use of lead-free solder, the assemblies are subjected to higher assembly and rework temperatures than those required for eutectic tin-lead assemblies. The rework of lead-free area array components involves the removal of defective component, preparation of the printed circuit board attachment pad (site redressing), solder paste replenishment or flux deposition, and component placement and reflow. This paper primarily focuses on the site redressing aspect of lead-free rework, followed by the development of rework processes for lead-free chip scale packages utilizing the knowledge gained in the site redressing studies.

Thermal-Fatigue Life Prediction Equation for Plastic Ball Grid Array (PBGA) SnAgCu Lead-Free Solder Joints

2005 ◽  
Author(s):  
John Lau ◽  
S. W. Ricky Lee ◽  
Fubin Song ◽  
Dongkai Shangguan ◽  
Dennis C. Lau ◽  
...  
Keyword(s):  
Life Prediction ◽  
Ball Grid Array ◽  
Prediction Equation ◽  
Fatigue Life Prediction ◽  
Lead Free ◽  
Lead Free Solder ◽  
Thermal Fatigue Life ◽  
Plastic Ball ◽  
Plastic Ball Grid Array ◽  
Free Solder

A new thermal-fatigue life prediction equation for a class of lead-free solder alloys, 95.5wt%Sn4.0wt%Ag0.5wt%Cu, is proposed in this investigation. The test vehicle consists of a lead-free solder plastic ball grid array (PBGA) package, a lead-free PCB, and lead-free solder paste (95.5wt%Sn3.9wt%Ag0.6wt%Cu). The coefficients of the fatigue equation presented herein are determined by best fit of the test vehicle’s isothermal fatigue data. Failure modes and locations of the failed samples are discussed.

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