Solder joint crack propagation analysis of wafer-level chip scale package on printed circuit board assemblies

2002 ◽  
Author(s):  
J. Lau ◽  
C. Chang ◽  
S.W.R. Lee
Keyword(s):  
Solder Joint ◽  
Crack Propagation ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Wafer Level ◽  
Printed Circuit ◽  
Propagation Analysis ◽  
Chip Scale Package

Effects of Void, Crack, and PCB Thickness on the Solder Joint Reliability of Wafer-Level Chip-Scale Package (WLCSP) Assemblies

2002 ◽  
Author(s):  
John Lau ◽  
Yida Zou ◽  
Sergio Camerlo
Keyword(s):  
Solder Joint ◽  
Printed Circuit Board ◽  
Temperature Cycling ◽  
Circuit Board ◽  
J Integral ◽  
Wafer Level ◽  
Solder Joint Reliability ◽  
Printed Circuit ◽  
Joint Reliability ◽  
Chip Scale Package

The creep analyses of solder-bumped wafer-level chip-scale package (WLCSP) on printed circuit board (PCB) subjected to temperature cycling loading are presented. Emphasis is placed on the effects of PCB thickness on the solder joint reliability of the WLCSP assembly. Also, the effects of crack-length on the crack tip characteristics such as the J-integral in the WLCSP solder joint are studied by the fracture mechanics method. Finally, the effects of voids on the crack growth in the WLCSP solder joint are investigated.

Creep Analysis of Wafer Level Chip Scale Package (WLCSP) With 96.5Sn-3.5Ag and 100In Lead-Free Solder Joints and Microvia Build-Up Printed Circuit Board

2000 ◽  
Author(s):  
John H. Lau ◽  
Stephen H. Pan ◽  
Chris Chang
Keyword(s):  
Shear Stress ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Lead Free ◽  
Lead Free Solder ◽  
Wafer Level ◽  
Shear Creep ◽  
Printed Circuit ◽  
Chip Scale Package ◽  
Free Solder

Abstract In this study, time-temperature-dependent nonlinear analyses of lead-free solder bumped wafer level chip scale package (WLCSP) on printed circuit board (PCB) assemblies subjected to thermal cycling conditions are presented. Two different lead-free solder alloys are considered, namely, 96.5wt%Sn-3.5wt%Ag and 100wt%In. The 62wt%Sn-36wt%Pb-2wt%Ag solder alloy is also considered to establish a baseline. All of these solder alloys are assumed to obey the Garofalo-Arrhenius steady-state creep constitutive law. The shear stress and shear creep strain hysteresis loops, shear stress history, and shear creep strain history at the corner solder joint are presented for a better understanding of the thermal-mechanical behaviors of lead-free solder bumped WLCSP on PCB assemblies. Also, the effects of microvia build-up PCB on the WLCSP solder joint reliability are investigated.

Creep Analysis of Wafer Level Chip Scale Package (WLCSP) With 96.5Sn-3.5Ag and 100In Lead-Free Solder Joints and Microvia Build-Up Printed Circuit Board

2002 ◽  
Vol 124 (2) ◽  
pp. 69-76 ◽  
Author(s):  
John H. Lau ◽  
Stephen H. Pan ◽  
Chris Chang
Keyword(s):  
Shear Stress ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Lead Free ◽  
Lead Free Solder ◽  
Wafer Level ◽  
Shear Creep ◽  
Printed Circuit ◽  
Chip Scale Package ◽  
Free Solder

In this study, time-temperature-dependent nonlinear analyses of lead-free solder bumped wafer level chip scale package (WLCSP) on printed circuit board (PCB) assemblies subjected to thermal cycling conditions are presented. Two different lead-free solder alloys are considered, namely, 96.5wt percent Sn-3.5wt percent Ag and 100wt percent In. The 62wt percent Sn-36wt percent Pb-2wt percent Ag solder alloy is also considered to establish a baseline. All of these solder alloys are assumed to obey the Garofalo-Arrhenius steady-state creep constitutive law. The shear stress and shear creep strain hysteresis loops, shear stress history, and shear creep strain history at the corner solder joint are presented for a better understanding of the thermal-mechanical behaviors of lead-free solder bumped WLCSP on PCB assemblies. Also, the effects of microvia build-up PCB on the WLCSP Solder joint reliability are investigated.

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