Impact properties of flip chip interconnection using anisotropically conductive film on the glass and flexible substrate

2004 ◽  
Author(s):  
Y.P. Wu ◽  
M.O. Alam ◽  
Y.C. Chan ◽  
B.Y. Wu
Keyword(s):  
Flip Chip ◽  
Flexible Substrate ◽  
Impact Properties ◽  
Conductive Film

Microwave model of anisotropic conductive film flip-chip interconnections for high frequency applications

1999 ◽  
Vol 22 (4) ◽  
pp. 575-581 ◽  
Author(s):  
Myung-Jin Yim ◽  
Woonghwan Ryu ◽  
Young-Doo Jeon ◽  
Junho Lee ◽  
Seungyoung Ahn ◽  
...  
Keyword(s):  
High Frequency ◽  
Flip Chip ◽  
Anisotropic Conductive Film ◽  
Conductive Film

Advanced Microelectronics Packaging Solutions for Miniaturized Medical Devices

2013 ◽  
Vol 2013 (DPC) ◽  
pp. 001963-001976
Author(s):  
Rabindra Das ◽  
Steven Rosser ◽  
Frank Egitto
Keyword(s):  
Flip Chip ◽  
New Technologies ◽  
High Reliability ◽  
Present Report ◽  
Flexible Substrate ◽  
System Level ◽  
Organic Substrates ◽  
Internal Layers ◽  
Microelectronics Packaging ◽  
Wide Range

The wide range of applications for medical electronics drives unique requirements that can differ significantly from commercial & military electronics. To accomplish this, new packaging structures need to be able to integrate more dies with greater function, higher I/O counts, smaller die pad pitches, and high reliability, while being pushed into smaller and smaller footprints. As a result, the microelectronics industry is moving toward alternative, innovative approaches as solutions for squeezing more function into smaller packages. In the present report, key enablers for achieving reduction in size, weight, and power (SWaP) in electronic packaging for a variety of medical applications are discussed. Advanced microelectronics packaging solutions with embedded passives are enabling SWaP reductions. Implementation of these solutions has realized up to 27X reduction in physical size for existing PWB assemblies, with significant reductions in weight. Shorter interconnects can also reduce or eliminate the need for termination resistors for some net topologies. Successful miniaturized products integrate the following design techniques and technologies: component footprint reduction, thin high density interconnects substrate technologies, I/O miniaturization and IC assembly capabilities. This paper presents fabrication and electrical characterization of embedded actives and passives on organic multilayered substrates. We have designed and fabricated several printed wiring board (PWB) and flip-chip package test vehicles focusing on embedded chips, resistors, and capacitors. Embedded passive technology further enhances miniaturization by enabling components to be moved from the surface of the substrate to its internal layers. The use of thin film resistor material allows creating individual miniaturized buried resistors. These resistors provide additional length and width reduction with negligible increases to the overall substrate and module (SiP) height. Resistor values can vary from 5 ohm to 50 Kohm with tolerances from 5 to 20% and areas as small as 0.2 mm2. The embedded resistors can be laser trimmed to a tolerance of <5% for applications that require tighter tolerance. The electrical properties of embedded capacitors fabricated from polymer-ceramic nanocomposites showed a stable capacitance and low loss over a wide frequency and temperature range. A few test vehicles were assembled to do system level analysis. Manufacturing methods and materials for producing advanced organic substrates and flex along with ultra fine pitch assemblies are discussed. A case study detailing the fabrication of a flexible substrate for use in an intravascular ultrasound (IVUS) catheter demonstrates how the challenges of miniaturization are met. These challenges include use of ultra-thin polymer films, extreme fine-feature circuitization, and assembly processes to accommodate die having reduced die pad pitch. In addition, new technologies for embedding a variety of active chips are being developed. A variety of active chips, including a chip having dimensions of one millimeter square, have been embedded and electrically connected to develop high performance packages.

Sensor Packaging: New Challenges for New Applications

2010 ◽  
Vol 2010 (1) ◽  
pp. 000687-000694
Author(s):  
Caroline Beelen-Hendrikx ◽  
Coen Tak
Keyword(s):  
Flip Chip ◽  
Flexible Substrate ◽  
Electrical Measurement ◽  
Ph Sensing ◽  
Molding Compound ◽  
Wire Bonds ◽  
The Wire ◽  
New Applications ◽  
Silicon Based ◽  
Electrical Connections

Advantages of silicon-based sensors are compatibility with CMOS, improved robustness and reliability, smaller size and reflow compatibility. Biosensors that use an electrical measurement principle need electrical connections and fluidic access to the die. This only works when the electrical interconnects are kept clean of biofluid and when the package is compatible with the biofluids, receptor chemicals and other sensor elements. In addition, the package needs to be very cheap. A simple plastic overmolded package with a hole in the compound at the sensor location is an effective solution. RFID sensors also need direct die access for gass and pH sensing. They require the integration of processor, memory, clock, battery and antenna. The package format depends on the application. For checking the quality of perishables during transport or in a store, a disposable flexible tag is needed whereas for smart building sensors, a plastic module is more appropriate. For the sensor tag, a flexible substrate and flip chip bare dies are used. Direct die access is realized by an opening in the flex. Battery and antenna are printed on the flex. Automotive sensors that are used under the hood need to cope with very high operating temperatures with peak temperatures of up to 200 °C and they need to be delamination free. The critical points in the standard plastic packages used today are the molding compound and the wire-bonds. Standard packages can be used up to 150 °C. For higher temperatures, the molding compound and the wire-bond interconnect are being improved.

EFFECT OF BUMP HEIGHT ON THE RELIABILITY OF ACA FLIP CHIP JOINING WITH FR4 RIGID AND POLYIMIDE FLEXIBLE SUBSTRATE

1998 ◽  
Vol 08 (03n04) ◽  
pp. 217-224 ◽  
Author(s):  
ZONGHE LAI ◽  
RUOYIN LAI ◽  
KATRIN PERSSON ◽  
JOHAN LIU
Keyword(s):  
Flip Chip ◽  
Flexible Substrate ◽  
Bump Height

Reliability Evaluation of CSP Using New Flip-Chip Bonding Technology: Both-Sided CSP and Single-Sided CSP

2002 ◽  
Author(s):  
Hideo Koguchi ◽  
Nipon Taweejun ◽  
Kazuto Nishida ◽  
Chie Sasaki
Keyword(s):  
Finite Element Method ◽  
Cross Section ◽  
Flip Chip ◽  
High Reliability ◽  
Reliability Evaluation ◽  
Thickness Direction ◽  
Material Parameters ◽  
Conductive Film ◽  
Chip Size ◽  
Bonding Technology

Chip-size packaging (CSP) attracts largely attentions due to its lighter, thinner and smaller size. In this study, the deformations and the stresses in the CSP fabricated by non-conductive film stud-bump direct interconnection (NSD) were analyzed. The reliability evaluation of single-sided CSP and both-sided CSP were investigated for heat cycles. The material parameters, i.e. stresses, strains and deformations, for achieving a high reliability of CSP were investigated using a finite element method and experiment. The dependency of the life in single-sided CSP and both-sided CSP on the thicknesses of IC and substrate could be expressed using a normal stress in the thickness direction and shear stress in the vertical cross section, respectively.

Optimizing System-on-Film (SOF) Design Using Finite Element Analysis

2011 ◽  
Author(s):  
Vikram Venkatadri ◽  
Mark Downey ◽  
Xiaojie Xue ◽  
Dipak Sengupta ◽  
Daryl Santos ◽  
...  
Keyword(s):  
Finite Element Analysis ◽  
Finite Element ◽  
Flip Chip ◽  
Flexible Substrate ◽  
High Density ◽  
Design Solution ◽  
Design Parameters ◽  
Optimized Design ◽  
Element Analysis ◽  
Bonding Parameters

System-On-Film (SOF) module is a complex integration of a fine pitch high density die and surface mounted discrete devices on a polyimide (PI) film laminate. The die is connected to the film using a thermo-compression flip-chip bonding (TCB) process which is capable of providing a very high density interconnect at less than 50um pitch. Several design and bonding parameters have to be controlled in order to achieve a reliable bond between the Au bumps on the die and the Sn plated Cu traces on the PI film. In the current work, the TCB process is studied using Finite Element Analysis (FEA) to optimize the design parameters and assure proper process margins. The resultant forces acting on the bump-to-trace interfaces are quantified across the different potential geometrical combinations. Baseline simulations showed higher stresses on specific bump locations and stress gradients acting on the bumps along the different sides of the die. These observations were correlated to both the failures and near failures on the actual test vehicles. Further simulations were then utilized to optimize and navigate design tradeoffs at both the die and flexible substrate design levels for a more robust design solution. Construction analysis performed on parts built using optimized design parameters showed significant improvements and correlated well with the simulation results.

Effect of High Glass Transition Temperature on Reliability of Non-Conductive Film (NCF)

2006 ◽  
Vol 326-328 ◽  
pp. 517-520 ◽  
Author(s):  
Jin Hyoung Park ◽  
Chang Kyu Chung ◽  
Kyoung Wook Paik ◽  
Soon Bok Lee
Keyword(s):  
Glass Transition ◽  
Shear Strain ◽  
Flip Chip ◽  
Coefficient Of Thermal Expansion ◽  
Moiré Interferometry ◽  
Moire Interferometry ◽  
Effective Parameters ◽  
Conductive Film ◽  
Interferometry Method ◽  
Stress Free State

Among many factors that influence the reliability of a flip-chip assembly using NCF interconnections, the most effective parameters are often the coefficient of thermal expansion (CTE), the modulus (E), and the glass transition temperatures (Tg). Of these factors, the effect of Tg on thermal deformation and device reliability is significant; however, it has not been shown clearly what effect Tg has on the reliability of NCF. The Tg of a conventional NCF material is approximately 110°C. In this study, a new high Tg NCF material that has a 140oC Tg is proposed. The thermal behaviors of the conventional and new NCFs between -40oC to 150oC are observed using an optical method. Twyman-Green interferometry and the moiré interferometry method are used to measure the thermal micro-deformations. The Twyman-Green interferometry measurement technique is applied to verify the stress-free state. The stress-free temperatures of the conventional and new Tg NCF materials are approximately 100oC and 120oC respectively. A shear strain at a part of the NCF chip edge is measured by moiré interferometry. Additionally, a method to accurately measure the residual warpage and shear strain at room temperature is proposed. Through the analysis of the relationship between the warpage and the shear strain, the effect of the high-Tg NCF material on the reliability is studied.

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