Automatic Design of Binary and Multiple-Valued Logic Gates on RTD Series

8th Euromicro Conference on Digital System Design (DSD'05) ◽

10.1109/dsd.2005.21 ◽

2005 ◽

Cited By ~ 4

Author(s):

K.S. Berezowski ◽

S.B.K. Vrudhula

Keyword(s):

Logic Gates ◽

Automatic Design ◽

Multiple Valued Logic

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Design and reliability analysis of multiple valued logic gates using carbon nanotube FETs

Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures - NANOARCH '12 ◽

10.1145/2765491.2765515 ◽

2012 ◽

Cited By ~ 1

Author(s):

Jinghang Liang ◽

Jie Han ◽

Linbin Chen ◽

Fabrizio Lombardi

Keyword(s):

Carbon Nanotube ◽

Reliability Analysis ◽

Logic Gates ◽

Multiple Valued Logic ◽

Carbon Nanotube Fets

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A Design for Multiple-Valued Logic Gates Based on MESFET's

IEEE Transactions on Computers ◽

10.1109/tc.1979.1675265 ◽

1979 ◽

Vol C-28 (11) ◽

pp. 854-862 ◽

Cited By ~ 3

Author(s):

Tront ◽

Givone

Keyword(s):

Logic Gates ◽

Multiple Valued Logic

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Automatic Design of DNA Logic Gates Based on Kinetic Simulation

Lecture Notes in Computer Science - DNA Computing and Molecular Programming ◽

10.1007/978-3-642-10604-0_9 ◽

2009 ◽

pp. 88-96 ◽

Cited By ~ 6

Author(s):

Ibuki Kawamata ◽

Fumiaki Tanaka ◽

Masami Hagiya

Keyword(s):

Logic Gates ◽

Automatic Design ◽

Kinetic Simulation

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Optical Multiple-Valued Logic Gates: Complement and Literals

Japanese Journal of Applied Physics ◽

10.1143/jjap.26.l1283 ◽

1987 ◽

Vol 26 (Part 2, No. 8) ◽

pp. L1283-L1285

Author(s):

Hitoshi Mada ◽

Takao Ozawa

Keyword(s):

Logic Gates ◽

Multiple Valued Logic

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Smart Universal Multiple-Valued Logic Gates by Transferring Single Electrons

IEEE Transactions on Nanotechnology ◽

10.1109/tnano.2008.920193 ◽

2008 ◽

Vol 7 (4) ◽

pp. 440-450 ◽

Cited By ~ 4

Author(s):

Wan-Cheng Zhang ◽

Nan-Jian Wu

Keyword(s):

Logic Gates ◽

Single Electrons ◽

Multiple Valued Logic

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Design and Evaluation of Multiple Valued Logic Gates Using Pseudo N-Type Carbon Nanotube FETs

IEEE Transactions on Nanotechnology ◽

10.1109/tnano.2014.2316000 ◽

2014 ◽

Vol 13 (4) ◽

pp. 695-708 ◽

Cited By ~ 65

Author(s):

Jinghang Liang ◽

Linbin Chen ◽

Jie Han ◽

Fabrizio Lombardi

Keyword(s):

Carbon Nanotube ◽

Logic Gates ◽

Multiple Valued Logic ◽

Carbon Nanotube Fets

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Design of multiple-valued logic gates using gate-diffusion input for image processing applications

Computers & Electrical Engineering ◽

10.1016/j.compeleceng.2018.05.019 ◽

2018 ◽

Vol 69 ◽

pp. 142-157 ◽

Cited By ~ 10

Author(s):

Ebrahim Abiri ◽

Abdolreza Darabi ◽

Sanaz Salem

Keyword(s):

Image Processing ◽

Logic Gates ◽

Multiple Valued Logic

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Multiple-Valued Logic Gates Using Asymmetric Single-Electron Transistors

2009 39th International Symposium on Multiple-Valued Logic ◽

10.1109/ismvl.2009.13 ◽

2009 ◽

Cited By ~ 2

Author(s):

Wan-cheng Zhang ◽

Nan-jian Wu ◽

Tamotsu Hashizume ◽

Seiya Kasai

Keyword(s):

Logic Gates ◽

Single Electron ◽

Single Electron Transistors ◽

Multiple Valued Logic ◽

Electron Transistors

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On universality of general reversible multiple-valued logic gates

Proceedings. 34th International Symposium on Multiple-Valued Logic ◽

10.1109/ismvl.2004.1319922 ◽

2004 ◽

Cited By ~ 11

Author(s):

P. Kerntopf ◽

M.A. Perkowski ◽

M.H.A. Khan

Keyword(s):

Logic Gates ◽

Multiple Valued Logic

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Improvement of Single-Electron Digital Logic Gates by Utilizing Input Discretizers

IEICE Transactions on Electronics ◽

10.1587/transele.e99.c.285 ◽

2016 ◽

Vol E99.C (2) ◽

pp. 285-292 ◽

Cited By ~ 1

Author(s):

Tran THI THU HUONG ◽

Hiroshi SHIMADA ◽

Yoshinao MIZUGAKI

Keyword(s):

Logic Gates ◽

Single Electron ◽

Digital Logic

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