Process development for the realization of thermally-reliable enhancement-mode InAlAs/InGaAs/InP HEMTs with excellent DC and RF performance

2006 ◽  
Author(s):  
Weifeng Zhao ◽  
Niu Jin ◽  
Guang Chen ◽  
Vipan Kumar ◽  
Ilesanmi Adesida
Keyword(s):  
Process Development ◽  
Enhancement Mode ◽  
Rf Performance

Non-Recessed-Gate Enhancement-Mode AlGaN/GaN High Electron Mobility Transistors with High RF Performance

2004 ◽  
Vol 43 (4B) ◽  
pp. 2255-2258 ◽  
Author(s):  
Akira Endoh ◽  
Yoshimi Yamashita ◽  
Keiji Ikeda ◽  
Masataka Higashiwaki ◽  
Kohki Hikosaka ◽  
...  
Keyword(s):  
Electron Mobility ◽  
High Electron Mobility Transistors ◽  
High Electron ◽  
High Electron Mobility ◽  
Enhancement Mode ◽  
Electron Mobility Transistors ◽  
Rf Performance ◽  
Recessed Gate

High RF Performance Enhancement-Mode Al2O3/AlGaN/GaN MIS-HEMTs Fabricated With High-Temperature Gate-Recess Technique

2015 ◽  
Vol 36 (8) ◽  
pp. 754-756 ◽  
Author(s):  
Sen Huang ◽  
Xinyu Liu ◽  
Jinhan Zhang ◽  
Ke Wei ◽  
Guoguo Liu ◽  
...  
Keyword(s):  
High Temperature ◽  
Performance Enhancement ◽  
Enhancement Mode ◽  
Rf Performance ◽  
Gate Recess

scholarly journals AlN/GaN-Based MOS-HEMT Technology: Processing and Device Results

2011 ◽  
Vol 2011 ◽  
pp. 1-7 ◽  
Author(s):  
S. Taking ◽  
D. MacFarlane ◽  
E. Wasige
Keyword(s):  
Ohmic Contact ◽  
Surface Passivation ◽  
Gate Dielectric ◽  
Process Development ◽  
Metal Deposition ◽  
Device Performance ◽  
Sidewall Passivation ◽  
Rf Performance ◽  
Wet Etch ◽  
Contact Optimisation

Process development of AlN/GaN MOS-HEMTs is presented, along with issues and problems concerning the fabrication processes. The developed technology uses thermally grown Al2O3as a gate dielectric and surface passivation for devices. Significant improvement in device performance was observed using the following techniques: (1) Ohmic contact optimisation using Al wet etch prior to Ohmic metal deposition and (2) mesa sidewall passivation. DC and RF performance of the fabricated devices will be presented and discussed in this paper.

Non-Recessed-Gate Enhancement-Mode AlGaN/GaN HEMTs with High RF Performance

2003 ◽  
Author(s):  
Akira Endoh ◽  
Yoshimi Yamashita ◽  
Keiji Ikeda ◽  
Masataka Higashiwaki ◽  
Kohki Hikosaka ◽  
...  
Keyword(s):  
Enhancement Mode ◽  
Gan Hemts ◽  
Rf Performance ◽  
Recessed Gate

Advanced TEM sample preparation techniques for submicron Si devices

1995 ◽  
Vol 53 ◽  
pp. 516-517 ◽  
Author(s):  
P. B. Basham ◽  
H. L. Tsai
Keyword(s):  
Sample Preparation ◽  
Process Development ◽  
Light Transmission ◽  
Specific Area ◽  
Turnaround Time ◽  
Small Hole ◽  
Area Of Interest ◽  
Transmission Electron ◽  
Polished Side ◽  
Preparation Techniques

The use of transmission electron microscopy (TEM) to support process development of advanced microelectronic devices is often challenged by a large amount of samples submitted from wafer fabrication areas and specific-spot analysis. Improving the TEM sample preparation techniques for a fast turnaround time is critical in order to provide a timely support for customers and improve the utilization of TEM. For the specific-area sample preparation, a technique which can be easily prepared with the least amount of effort is preferred. For these reasons, we have developed several techniques which have greatly facilitated the TEM sample preparation.For specific-area analysis, the use of a copper grid with a small hole is found to be very useful. With this small-hole grid technique, TEM sample preparation can be proceeded by well-established conventional methods. The sample is first polished to the area of interest, which is then carefully positioned inside the hole. This polished side is placed against the grid by epoxy Fig. 1 is an optical image of a TEM cross-section after dimpling to light transmission.

The Structure and Properties of MoSi2 Thin Film in Mos Process

1980 ◽  
Vol 38 ◽  
pp. 326-327
Author(s):  
C.K. Wu ◽  
P. Chang ◽  
N. Godinho
Keyword(s):  
Thin Film ◽  
Integrated Circuits ◽  
High Performance ◽  
Large Scale ◽  
Process Development ◽  
Structure And Properties ◽  
Metal Silicides ◽  
High Oxidation ◽  
Important Approach ◽  
High Oxidation Resistance

Recently, the use of refractory metal silicides as low resistivity, high temperature and high oxidation resistance gate materials in large scale integrated circuits (LSI) has become an important approach in advanced MOS process development (1). This research is a systematic study on the structure and properties of molybdenum silicide thin film and its applicability to high performance LSI fabrication.

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