Yield-reliability modeling for fault tolerant integrated circuits

2002 ◽  
Author(s):  
T.S. Barnett ◽  
A.D. Singh ◽  
V.P. Nelson
Keyword(s):  
Integrated Circuits ◽  
Fault Tolerant ◽  
Reliability Modeling

On reliability modeling of closed fault-tolerant computer systems

1990 ◽  
Vol 39 (4) ◽  
pp. 571-575 ◽  
Author(s):  
M. Balakrishnan ◽  
C.S. Raghavendra
Keyword(s):  
Fault Tolerant ◽  
Computer Systems ◽  
Reliability Modeling

scholarly journals Reliability Modeling of Fault Tolerant Control Systems

2007 ◽  
Vol 17 (4) ◽  
pp. 491-504 ◽  
Author(s):  
Hongbin LI ◽  
Qing Zhao ◽  
Zhenyu Yang
Keyword(s):  
Markov Process ◽  
Control Systems ◽  
Reliability Index ◽  
Process Model ◽  
Fault Tolerant ◽  
Fault Tolerant Control ◽  
Reliability Evaluation ◽  
Reliability Modeling ◽  
Semi Markov Process ◽  
Hard Deadline

Reliability Modeling of Fault Tolerant Control SystemsThis paper proposes a novel approach to reliability evaluation for active Fault Tolerant Control Systems (FTCSs). By introducing a reliability index based on the control performance and hard deadline, a semi-Markov process model is proposed to describe system operation for reliability evaluation. The degraded performance of FTCSs in the presence of imperfect Fault Detection and Isolation (FDI) is reflected by semi-Markov states. The semi-Markov kernel, the key parameter of the process, is determined by four probabilistic parameters based on the Markovian model of FTCSs. Computed from the transition probabilities of the semi-Markov process, the reliability index incorporates control objectives, hard deadline, and the effects of imperfect FDI, a suitable quantitative measure of the overall performance.

scholarly journals TFI-FTS: An efficient transient fault injection and fault-tolerant system for asynchronous circuits on FPGA platform

2021 ◽  
Vol 11 (3) ◽  
pp. 2704
Author(s):  
Sharath Kumar Y. N. ◽  
Dinesha P.
Keyword(s):  
Integrated Circuits ◽  
Digital Circuits ◽  
Fault Tolerant ◽  
Fault Injection ◽  
Asynchronous Circuits ◽  
Fault Coverage ◽  
Asynchronous Circuit ◽  
Hardware Complexity ◽  
Transient Fault ◽  
Fault Tolerant System

Designing VLSI digital circuits is challenging tasks because of testing the circuits concerning design time. The reliability and productivity of digital integrated circuits are primarily affected by the defects in the manufacturing process or systems. If the defects are more in the systems, which leads the fault in the systems. The fault tolerant systems are necessary to overcome the faults in the VLSI digital circuits. In this research article, an asynchronous circuits based an effective transient fault injection (TFI) and fault tolerant system (FTS) are modelled. The TFI system generates the faults based on BMA based LFSR with faulty logic insertion and one hot encoded register. The BMA based LFSR reduces the hardware complexity with less power consumption on-chip than standard LFSR method. The FTS uses triple mode redundancy (TMR) based majority voter logic (MVL) to tolerant the faults for asynchronous circuits. The benchmarked 74X-series circuits are considered as an asynchronous circuit for TMR logic. The TFI-FTS module is modeled using Verilog-HDL on Xilinx-ISE and synthesized on hardware platform. The Performance parameters are tabulated for TFI-FTS based asynchronous circuits. The performance of TFI-FTS Module is analyzed with 100% fault coverage. The fault coverage is validated using functional simulation of each asynchronous circuit with fault injection in TFI-FTS Module.

Issues in Reliability Modeling of Fault-Tolerant Computers

1984 ◽  
pp. 228-239
Author(s):  
Kishor Trivedi ◽  
Joanne Bechta Dugan ◽  
Robert Geist ◽  
Mark Smotherman
Keyword(s):  
Fault Tolerant ◽  
Reliability Modeling
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